X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=client%2FGoodFETARM.py;h=33058203ed6e81d31132147bc14585e3cbae78bd;hp=9991d55eef817e7dc87a6165971b5a5398313864;hb=b7a6e00b7d75a7f29401c2aeeb2e19cbd622d678;hpb=8203dc42156b3745f4f79ba7da4845da365902ff

diff --git a/client/GoodFETARM.py b/client/GoodFETARM.py
index 9991d55..3305820 100644
--- a/client/GoodFETARM.py
+++ b/client/GoodFETARM.py
@@ -7,6 +7,7 @@
 #
 
 import sys, binascii, struct
+import atlasutils.smartprint as asp
 
 #Global Commands
 READ  = 0x00
@@ -64,16 +65,16 @@ class GoodFETARM(GoodFET):
     """A GoodFET variant for use with ARM7TDMI microprocessor."""
     def ARMhaltcpu(self):
         """Halt the CPU."""
-        self.writecmd(0x33,HALTCPU,0,self.data)
+        self.writecmd(0x13,HALTCPU,0,self.data)
     def ARMreleasecpu(self):
         """Resume the CPU."""
-        self.writecmd(0x33,RESUMECPU,0,self.data)
+        self.writecmd(0x13,RESUMECPU,0,self.data)
     def ARMsetModeArm(self):
-        self.writecmd(0x33,SET_MODE_ARM,0,self.data)
+        self.writecmd(0x13,SET_MODE_ARM,0,self.data)
     def ARMtest(self):
-        self.ARMreleasecpu()
-        self.ARMhaltcpu()
-        #print "Status: %s" % self.ARMstatusstr()
+        #self.ARMreleasecpu()
+        #self.ARMhaltcpu()
+        print "Status: %s" % self.ARMstatusstr()
         
         #Grab ident three times, should be equal.
         ident1=self.ARMident()
@@ -83,9 +84,27 @@ class GoodFETARM(GoodFET):
             print "Error, repeated ident attempts unequal."
             print "%04x, %04x, %04x" % (ident1, ident2, ident3)
         
+        #Set and Check Registers
+        regs = [1024+x for x in range(0,15)]
+        regr = []
+        for x in range(len(regs)):
+            self.ARMset_register(x, regs[x])
+
+        for x in range(len(regs)):
+            regr.append(self.ARMget_register(x))
+        
+        for x in range(len(regs)):
+            if regs[x] != regr[x]:
+                print "Error, R%d fail: %x != %x"%(x,regs[x],regr[x])
+
+        return
+
+
+
+
         #Single step, printing PC.
         print "Tracing execution at startup."
-        for i in range(1,15):
+        for i in range(15):
             pc=self.ARMgetPC()
             byte=self.ARMpeekcodebyte(i)
             #print "PC=%04x, %02x" % (pc, byte)
@@ -112,24 +131,23 @@ class GoodFETARM(GoodFET):
     def setup(self):
         """Move the FET into the JTAG ARM application."""
         #print "Initializing ARM."
-        self.writecmd(0x33,SETUP,0,self.data)
+        self.writecmd(0x13,SETUP,0,self.data)
     def ARMget_dbgstate(self):
         """Read the config register of an ARM."""
-        self.writecmd(0x33,GET_DEBUG_STATE,0,self.data)
-        print "DEBUGGING get_dbgstate:  %s"%repr(self.data)
+        self.writecmd(0x13,GET_DEBUG_STATE,0,self.data)
         retval = struct.unpack("<L", self.data[:4])[0]
         return retval
     def ARMget_dbgctrl(self):
         """Read the config register of an ARM."""
-        self.writecmd(0x33,GET_DEBUG_CTRL,0,self.data)
+        self.writecmd(0x13,GET_DEBUG_CTRL,0,self.data)
         retval = struct.unpack("B", self.data)[0]
         return retval
     def ARMset_dbgctrl(self,config):
         """Write the config register of an ARM."""
-        self.writecmd(0x33,SET_DEBUG_CTRL,1,[config&7])
+        self.writecmd(0x13,SET_DEBUG_CTRL,1,[config&7])
     def ARMlockchip(self):
         """Set the flash lock bit in info mem."""
-        self.writecmd(0x33, LOCKCHIP, 0, [])
+        self.writecmd(0x13, LOCKCHIP, 0, [])
     
 
     def ARMidentstr(self):
@@ -140,75 +158,76 @@ class GoodFETARM(GoodFET):
         return "mfg: %x\npartno: %x\nver: %x\n(%x)" % (ver, partno, mfgid, ident); 
     def ARMident(self):
         """Get an ARM's ID."""
-        self.writecmd(0x33,GET_CHIP_ID,0,[])
+        self.writecmd(0x13,GET_CHIP_ID,0,[])
         retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
         return retval
     def ARMgetPC(self):
         """Get an ARM's PC."""
-        self.writecmd(0x33,GET_PC,0,[])
+        self.writecmd(0x13,GET_PC,0,[])
         retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
         return retval
     def ARMget_register(self, reg):
         """Get an ARM's Register"""
-        self.writecmd(0x33,GET_REGISTER,1,[reg&0xff])
-        print "DEBUG:GET_REGISTER: %s"%repr(self.data)
+        self.writecmd(0x13,GET_REGISTER,1,[reg&0xff])
         retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
         return retval
     def ARMset_register(self, reg, val):
         """Get an ARM's Register"""
-        self.writecmd(0x33,GET_REGISTER,8,[reg,0,0,0,val>>24, (val>>16)&0xff, (val>>8)&0xff, val&0xff])
-        print "DEBUG:SET_REGISTER: %s"%repr(self.data)
+        self.writecmd(0x13,SET_REGISTER,8,[val&0xff, (val>>8)&0xff, (val>>16)&0xff, val>>24, reg,0,0,0])
+        #self.writecmd(0x13,SET_REGISTER,8,[reg,0,0,0, (val>>16)&0xff, val>>24, val&0xff, (val>>8)&0xff])
         retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
         return retval
     def ARMget_registers(self):
-        """Get an ARM's Register"""
-        self.writecmd(0x33,GET_REGISTERS,0,[])
-        print "DEBUG:GET_REGISTER: %s"%repr(self.data)
-        #retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
+        """Get ARM Registers"""
+        self.writecmd(0x13,GET_REGISTERS,0, [])
+        retval = []
+        for x in range(0,len(self.data), 4):
+          retval.append(struct.unpack("<L", self.data[x:x+4])[0])
         return retval
     def ARMset_registers(self, regs):
-        """Get an ARM's Register"""
+        """Set ARM Registers"""
         regarry = []
         for reg in regs:
-          regarray.merge([reg>>24, (reg>>16)&0xff, (reg>>8)&0xff, reg&0xff])
-        self.writecmd(0x33,GET_REGISTER,16*4,regarray)
-        print "DEBUG:SET_REGISTER: %s"%repr(self.data)
+          regarry.extend([reg&0xff, (reg>>8)&0xff, (reg>>16)&0xff, reg>>24])
+        self.writecmd(0x13,SET_REGISTERS,16*4,regarry)
         retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
         return retval
     def ARMcmd(self,phrase):
-        self.writecmd(0x33,READ,len(phrase),phrase)
+        self.writecmd(0x13,READ,len(phrase),phrase)
         val=ord(self.data[0])
         print "Got %02x" % val
         return val
     def ARMdebuginstr(self,instr):
         if type (instr) == int:
             instr = struct.pack("<L", instr)
-        self.writecmd(0x33,DEBUG_INSTR,len(instr),instr)
+        self.writecmd(0x13,DEBUG_INSTR,len(instr),instr)
         return (self.data[0])
-    def ARMpeekcodebyte(self,adr):
+    def ARMpeekcodebyte(self,adr,words):
         """Read the contents of code memory at an address."""
-        self.data=[adr&0xff, (adr&0xff00)>>8]
-        self.writecmd(0x33,PEEK,2,self.data)
-        retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
-        return retval
+        self.data=[adr&0xff, (adr>>8)&0xff, (adr>>16)&0xff, (adr>>24)&0xff, words&0xff, (words>>8)&0xff, (words>>16)&0xff, (words>>24)&0xff ]
+        self.writecmd(0x13,PEEK,2,self.data)
+        retval = []
+        retval.append(self.serialport.read(words*4))
+        #retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
+        return "".join(retval)
     def ARMpeekdatabyte(self,adr):
         """Read the contents of data memory at an address."""
-        self.data=[adr&0xff, (adr&0xff00)>>8]
-        self.writecmd(0x33, PEEK, 2, self.data)
+        self.data=[adr&0xff, (adr&0xff00)>>8, (adr&0xff0000)>>16, (adr&0xff000000)>>24]
+        self.writecmd(0x13, PEEK, 2, self.data)
         retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
         return retval
     def ARMpokedatabyte(self,adr,val):
         """Write a byte to data memory."""
         self.data=[adr&0xff, (adr&0xff00)>>8, val]
-        self.writecmd(0x33, POKE, 3, self.data)
+        self.writecmd(0x13, POKE, 3, self.data)
         retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
         return retval
     def ARMchiperase(self):
         """Erase all of the target's memory."""
-        self.writecmd(0x33,CHIP_ERASE,0,[])
+        self.writecmd(0x13,CHIP_ERASE,0,[])
     def ARMstatus(self):
         """Check the status."""
-        self.writecmd(0x33,GET_DEBUG_STATE,0,[])
+        self.writecmd(0x13,GET_DEBUG_STATE,0,[])
         return ord(self.data[0])
     ARMstatusbits={
                   0x10 : "TBIT",
@@ -235,7 +254,7 @@ class GoodFETARM(GoodFET):
         return str
     def start(self):
         """Start debugging."""
-        self.writecmd(0x33,START,0,self.data)
+        self.writecmd(0x13,START,0,self.data)
         #ident=self.ARMidentstr()
         #print "Target identifies as %s." % ident
         #print "Status: %s." % self.ARMstatusstr()
@@ -245,10 +264,10 @@ class GoodFETARM(GoodFET):
         
     def stop(self):
         """Stop debugging."""
-        self.writecmd(0x33,STOP,0,self.data)
+        self.writecmd(0x13,STOP,0,self.data)
     def ARMstep_instr(self):
         """Step one instruction."""
-        self.writecmd(0x33,STEP_INSTR,0,self.data)
+        self.writecmd(0x13,STEP_INSTR,0,self.data)
     def ARMflashpage(self,adr):
         """Flash 2kB a page of flash from 0xF000 in XDATA"""
         data=[adr&0xFF,
@@ -256,7 +275,7 @@ class GoodFETARM(GoodFET):
               (adr>>16)&0xFF,
               (adr>>24)&0xFF]
         print "Flashing buffer to 0x%06x" % adr
-        self.writecmd(0x33,MASS_FLASH_PAGE,4,data)
+        self.writecmd(0x13,MASS_FLASH_PAGE,4,data)
 
     def writecmd(self, app, verb, count=0, data=[]):
         """Write a command and some data to the GoodFET."""