X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=client%2FGoodFETARM7.py;h=88da8ac0a7dd704a901bee2f995452da3c52e910;hp=83fc5160e1412911bc0b6495b460087e3ed790aa;hb=042a155324ef5b76951e0194f61ab28c1c0521ce;hpb=3fbd4830f8d8dc3011415f1aab574561f603cd6e

diff --git a/client/GoodFETARM7.py b/client/GoodFETARM7.py
index 83fc516..88da8ac 100644
--- a/client/GoodFETARM7.py
+++ b/client/GoodFETARM7.py
@@ -40,7 +40,7 @@ OK    = 0x7F
 IR_SHIFT =                  0x80
 DR_SHIFT =                  0x81
 RESETTAP =                  0x82
-RESETTARGET =               0x86
+RESETTARGET =               0x83
 GET_REGISTER =              0x87
 SET_REGISTER =              0x88
 DEBUG_INSTR =               0x89
@@ -133,7 +133,8 @@ ARM_INSTR_STR_R1_r0_4 =     0xe4801004L
 ARM_WRITE_MEM =             ARM_INSTR_STR_R1_r0_4
 ARM_INSTR_MRS_R0_CPSR =     0xe10f0000L
 ARM_INSTR_MSR_cpsr_cxsf_R0 =0xe12ff000L
-ARM_INSTR_STMIA_R14_r0_rx = 0xE88E0000L      # add up to 65k to indicate which registers...
+ARM_INSTR_STMIA_R14_r0_rx = 0xE88e0000L      # add up to 65k to indicate which registers...
+ARM_INSTR_LDMIA_R14_r0_rx = 0xE89e0000L      # add up to 65k to indicate which registers...
 ARM_STORE_MULTIPLE =        ARM_INSTR_STMIA_R14_r0_rx
 ARM_INSTR_SKANKREGS =       0xE88F7fffL
 ARM_INSTR_CLOBBEREGS =      0xE89F7fffL
@@ -183,6 +184,7 @@ DBGCTRLBITS = {
         1<<ENABLE:'ENABLE',
         }
 
+LDM_BITMASKS = [(1<<x)-1 for x in xrange(16)]
 #### TOTALLY BROKEN, NEED VALIDATION AND TESTING
 PCOFF_DBGRQ = 4 * 4
 PCOFF_WATCH = 4 * 4
@@ -304,20 +306,16 @@ class GoodFETARM(GoodFET):
         return retval
     def ARMget_registers(self):
         """Get ARM Registers"""
-        # FIXME: should we clobber r15 first?  if results get wonky, we will.
-        self.ARMdebuginstr(ARM_INSTR_SKANKREGS,0)
-        self.ARM_nop(0)
-        self.ARM_nop(0)
-        regs = [ struct.unpack("<L", self.ARM_nop(0))[0] for x in range(15) ]
+        regs = [ self.ARMget_register(x) for x in range(15) ]
         regs.append(self.ARMgetPC())            # make sure we snag the "static" version of PC
         return regs
     def ARMset_registers(self, regs, mask):
         """Set ARM Registers"""
         for x in xrange(15):
           if (1<<x) & mask:
-            self.ARMset_register(x,regs.pop())
+            self.ARMset_register(x,regs.pop(0))
         if (1<<15) & mask:                      # make sure we set the "static" version of PC or changes will be lost
-          self.ARMsetPC(regs.pop())
+          self.ARMsetPC(regs.pop(0))
     def ARMdebuginstr(self,instr,bkpt):
         if type (instr) == int or type(instr) == long:
             instr = struct.pack("<L", instr)
@@ -501,7 +499,56 @@ class GoodFETARM(GoodFET):
         self.ARMset_register(1, r1);       # restore R0 and R1 
         self.ARMset_register(0, r0);
         return retval
-
+    def ARMreadChunk(self, adr, wordcount):         
+        """ Only works in ARM mode currently
+        WARNING: Addresses must be word-aligned!
+        """
+        regs = self.ARMget_registers()
+        self.ARMset_registers([0xdeadbeef for x in xrange(14)], 0xe)
+        output = []
+        count = wordcount
+        while (wordcount > 0):
+            count = (wordcount, 0xe)[wordcount>0xd]
+            bitmask = LDM_BITMASKS[count]
+            self.ARMset_register(14,adr)
+            self.ARM_nop(1)
+            self.ARMdebuginstr(ARM_INSTR_LDMIA_R14_r0_rx | bitmask ,0)
+            #FIXME: do we need the extra nop here?
+            self.ARMrestart()
+            self.ARMwaitDBG()
+            output.extend([self.ARMget_register(x) for x in xrange(count)])
+            wordcount -= count
+            adr += count*4
+            #print hex(adr)
+        # FIXME: handle the rest of the wordcount here.
+        self.ARMset_registers(regs,0xe)
+        return output
+    def ARMreadStream(self, adr, bytecount):
+        data = [struct.unpack("<L", x) for x in self.ARMreadChunk(adr, (bytecount-1/4)+1)]
+        return "".join(data)[:bytecount]
+        
+    def ARMwriteChunk(self, adr, wordarray):         
+        """ Only works in ARM mode currently
+        WARNING: Addresses must be word-aligned!
+        """
+        regs = self.ARMget_registers()
+        wordcount = len(wordarray)
+        while (wordcount > 0):
+            count = (wordcount, 0xe)[wordcount>0xd]
+            bitmask = LDM_BITMASKS[count]
+            self.ARMset_register(14,adr)
+            print len(wordarray),bin(bitmask)
+            self.ARMset_registers(wordarray[:count],bitmask)
+            self.ARM_nop(1)
+            self.ARMdebuginstr(ARM_INSTR_STMIA_R14_r0_rx | bitmask ,0)
+            #FIXME: do we need the extra nop here?
+            self.ARMrestart()
+            self.ARMwaitDBG()
+            wordarray = wordarray[count:]
+            wordcount -= count
+            adr += count*4
+            print hex(adr)
+        # FIXME: handle the rest of the wordcount here.
     def ARMwriteMem(self, adr, wordarray):
         r0 = self.ARMget_register(0);        # store R0 and R1
         r1 = self.ARMget_register(1);
@@ -533,7 +580,8 @@ class GoodFETARM(GoodFET):
                   0x02 : "force dbgrq",
                   0x01 : "force dbgack"
                   }
-                  
+    def ARMresettarget(self, delay=10):
+        return self.writecmd(0x13,RESETTARGET,2, [ delay&0xff, (delay>>8)&0xff ] )
     def ARMchain0(self, address, bits=0x819684c054, data=0):
         bulk = chop(address,4)
         bulk.extend(chop(bits,8))