X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=client%2FGoodFETAT91X40.py;h=0776c2d68064d7f6ad22e90ec066019322c0f992;hp=cb9c7a85487312f29906c84fc3a3caaa99254b55;hb=0a6754712a364a01d149dc518f44b258a3a37cf8;hpb=f579dc0b07543845d69faa340468acab71d8044f diff --git a/client/GoodFETAT91X40.py b/client/GoodFETAT91X40.py index cb9c7a8..0776c2d 100644 --- a/client/GoodFETAT91X40.py +++ b/client/GoodFETAT91X40.py @@ -225,6 +225,17 @@ def ebi_csr_decode(reg): wse = (reg>>5)&1 nws = (reg>>2)&7 dbw = (reg&3) + return [ addr, csen, bat, tdf, pages, wse, nws, dbw] + +def ebi_csr_decode_str(reg): + (addr, + csen, + bat, + tdf, + pages, + wse, + nws, + dbw) = ebi_csr_decode(reg) output = ["(register: %x)"%reg, "Base Address: %s"%hex(addr<<20), "Chip Select: %s"%("False","True")[csen], @@ -251,21 +262,36 @@ mcr_ale = { def mcr_decode(mcr): validAddrBits,maxAddrSpace,validCS,codeLabel = mcr_ale[mcr&7] drp = mcr>>4 - output = ["Valid Address Bits: %s"%validAddrBits, - "Maximum Address Space: %xMB"%maxAddrSpace, + #print hex(drp) + if drp and drp != 1: + drp = 2 + return (validAddrBits, maxAddrSpace, validCS, codeLabel, drp) + +def mcr_decode_str(mcr): + ( validAddrBits, maxAddrSpace, validCS, codeLabel, drp) = mcr_decode(mcr) + output = [ + "(register: %x)"%mcr, + "Valid Address Bits: %s"%validAddrBits, + "Maximum Address Space: 0x%x MB"%maxAddrSpace, "Valid Chip Select: %s"%validCS, "Code Label: %s"%codeLabel, - ("Standard Read Protocol for all external memory devices enabled (EBI_DRP_STANDARD)","Early Read Protocol for all external memory devices enabled (EBI_DRP_EARLY)")[drp] + ("Standard Read Protocol for all external memory devices enabled (EBI_DRP_STANDARD)","Early Read Protocol for all external memory devices enabled (EBI_DRP_EARLY)","Invalid mcr")[drp] ] return "\n".join(output) def wd_omr_decode(omr): - return "\n".join(["External Signal: %s"%("disabled","enabled")[(omr>>3)&1], - "External Signal: %s"%("disabled","enabled")[(omr>>3)&1], - "Interrupt: %s"%("disabled","enabled")[(omr>>2)&1], - "Reset: %s"%("disabled","enabled")[(omr>>1)&1], - "Watch Dog: %s"%("disabled","enabled")[(omr)&1], + return (omr>>4, (omr>>3)&1, (omr>>2)&1, (omr>>1)&1, omr&1) + +def wd_omr_decode_str(omr): + ( okey, esig, int, rst, wdog ) = wd_omr_decode(omr) + return "\n".join([ + "Overflow Access Key (OKEY): %x"%(okey), + "External Signal (EXTEN): %s"%("disabled","enabled")[esig], + "Interrupt (IRQEN): %s"%("disabled","enabled")[int], + "Reset (RSTEN): %s"%("disabled","enabled")[rst], + "Watch Dog (WDEN): %s"%("disabled","enabled")[wdog], ]) + def wd_cmr_decode(cmr): return "MCK/%d"%(8,32,128,1024)[(cmr>>2)&0xf] @@ -273,25 +299,41 @@ def wd_cmr_decode(cmr): -class GoodFETAT91X40(GoodFETARM): +class GoodFETAT91X40(GoodFETARM7): def __init__(self): - GoodFETARM.__init__(self) + GoodFETARM7.__init__(self) self.usart0 = usart.USART(usart.USART0_BASE) self.usart1 = usart.USART(usart.USART1_BASE) + + def halt(self, disableWD=True): + GoodFETARM7.halt(self) + if not disableWD: return + + #Disable Watch Dog + self.disableWatchDog() + + def resume(self, enableWD=False): + GoodFETARM7.resume(self) + if not enableWD: return + + self.enableWatchDog() + def getChipSelectReg(self, chipnum): addr = EBI_BASE + (chipnum*4) reg, = self.ARMreadChunk(addr,1) return reg def getChipSelectRegstr(self, chipnum): + return ebi_csr_decode_str(self.getChipSelectReg(chipnum)) + def getChipSelectReglist(self, chipnum): return ebi_csr_decode(self.getChipSelectReg(chipnum)) def setChipSelectReg(self, chipnum, value): addr = EBI_BASE + (chipnum*4) self.ARMwriteChunk(addr,[value]) - def getEBIMemoryMap(self): + def getEBIMemoryMapstr(self): keys = ebi_memory_map_items.keys() keys.sort() - output = [ "EBI Memory Map"] + output = [ "===EBI Memory Map==="] for x in xrange(8): desc,name,rw,default = ebi_memory_map_items[x*4] output.append("\nMAP: %s (%s) - default: %x\n%s"%(name,desc,default,self.getChipSelectRegstr(x))) @@ -302,7 +344,9 @@ class GoodFETAT91X40(GoodFETARM): mcr, = self.ARMreadMem(EBI_MCR) return mcr def getMemoryControlRegisterstr(self): - return mcr_decode(self.getMemoryControlRegister()) + return mcr_decode_str(self.getMemoryControlRegister()) + def getEBIMCRstr(self): + return "EBI Memory Control Register\n" + self.getMemoryControlRegisterstr() def getInterruptSourceModeReg(self, regnum): regval = self.ARMreadMem(AIC_SMR[regnum][0]) @@ -380,17 +424,36 @@ class GoodFETAT91X40(GoodFETARM): def getWatchDogOverflowModeReg(self): return self.ARMreadMem(WD_OMR) def getWatchDogOverflowModeStr(self): - return wd_omr_decode(self.getWatchDogOverflowModeReg()) - def setWatchDogOverflowModeReg(self, mode=0x2340): - self.ARMwriteMem(WD_OMR, mode) + return wd_omr_decode_str(self.getWatchDogOverflowModeReg()[0]) + def setWatchDogOverflowModeReg(self, mode=0x00002340): + self.ARMwriteMem(WD_OMR, [mode]) def getWatchDogClockModeReg(self): - return self.ARMreadMem(WD_CMR) + return self.ARMreadMem(WD_CMR)[0] def setWatchDogClockModeReg(self, mode=0x06e): - self.ARMwriteMem(WD_CMR, mode) + self.ARMwriteMem(WD_CMR, [mode]) def setWatchDogControlReg(self, mode=0xC071): - self.ARMwriteMem(WD_CR, mode) + self.ARMwriteMem(WD_CR, [mode]) def getWatchDogStatusReg(self): - return self.ARMreadMem(WD_SR) + return self.ARMreadMem(WD_SR)[0] + def disableWatchDog(self): + # 0x234 in OKEY enables writing and 0 in lowest nibble disables + self.setWatchDogOverflowModeReg() + def enableWatchDog(self): + # Initialize the WD Clock Mode Register + self.setWatchDogClockModeReg(mode=0x0000373c) + # Restart the timer + self.setWatchDogControlReg(mode=0x0000c071) + # Enable the watchdog + self.setWatchDogOverflowModeReg(mode=0x00002340) + def statWatchDog(self): + print "Status Watch Dog:" + print "Register Value: 0b%s" % '{0:032b}'.format(self.getWatchDogOverflowModeReg()[0]) + print self.getWatchDogOverflowModeStr() + print "Clock Mode Reg: %x" % self.getWatchDogClockModeReg() + print "Status Reg: %x" % self.getWatchDogStatusReg() + def checkWatchDog(self): + return self.getWatchDogOverflowModeStr() + def getChipID(self): chipid = self.ARMreadMem(SF_CIDR,1) @@ -439,4 +502,228 @@ class GoodFETAT91X40(GoodFETARM): for page in xrange(pagecount): pages.append(self.ARMreadChunk(addr+(pagesz*page), pagesz)) return pages - + + +######### command line stuff ######### + +from GoodFETARM7 import * + +def at91x40_main(): + ''' this function should be called from command line app ''' + #Initialize FET and set baud rate + client=GoodFETAT91X40() + client.serInit() + + client.setup() + client.start() + + at91x40_cli_handler(client, sys.argv) + + + +BLOCK_DWORDS = 48 +BLOCK_SIZE = 4 * BLOCK_DWORDS +def at91x40_cli_handler(client, argv): + + if(argv[1]=="chipRegStr"): + client.halt() + print "#####" + print client.getChipSelectRegstr(int(argv[2])) + print "#####" + client.resume() + + if(argv[1]=="chipRegList"): + client.halt() + print "#####" + print client.getChipSelectReglist(int(argv[2])) + print "#####" + client.resume() + + if(argv[1]=="chipRegValue"): + client.halt() + print "#####" + print "Chip Register Value:",hex(client.getChipSelectReg(int(argv[2]))) + print "#####" + + if(argv[1]=="ecdump"): + f = argv[2] + start=0x00000000 + stop=0xFFFFFFFF + if(len(argv)>3): + start=int(argv[3],16) + if(len(argv)>4): + stop=int(argv[4],16) + + ##############################3 + # Error checking requires a special register + # Should an error occur while reading from the chip's memory + # These values will help to test if the chip is working and + # the memory is mapped properly before continuing + # Use the chipRegStr verb to determine the value of the + # Special Register when the chip is operating normally + # Example: ./goodfet.at91x40 chipRegValue 1 + ##############################3 + # user$ ./goodfet.at91x40 chipRegValue 1 + # Identifying Target: + # # DEBUG 0x120 + # Chip IDCODE: 0x1f0f0f0f + # ver: 1 + # partno: f0f0 + # mfgid: 787 + # + # Debug Status: Interrupts Enabled (or not?) + # + # ##### + # Chip Register Value: 0x10000000 + # ##### + ############################## + special_reg_num=1 + special_addr=0x010000000 + if(len(argv)>5): + # Yes, this requires that you set the start and stop addresses + special_reg_num=int(argv[5]) + special_addr=int(argv[6],16) + err_list = [] + + print "Dumping from %04x to %04x as %s." % (start,stop,f) + # FIXME: get mcu state and return it to that state + client.halt() + + h = IntelHex(None) + base = start + err_cnt = 0 + reset_cnt = 0 + while base<=stop: + confirmed = False + while not confirmed: + i = base + try: + data=client.ARMreadChunk(i, BLOCK_DWORDS, verbose=0) + print "Dumped %06x."%i + for dword in data: + if i<=stop:# and dword != 0xdeadbeef: + h.puts( i, struct.pack("