X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fchipcon%2Fchipcon.c;h=05349ea9f7194da63fb7387156c2f51aca2e8a80;hp=d4e81775defc775e09e9186bedad105bd2f07eaa;hb=f4a6b415e762bcdc560f3ea655851d16f483ea5a;hpb=d0a3fb542f527cbf9a4a27beecc8c3cd76ff4625 diff --git a/firmware/apps/chipcon/chipcon.c b/firmware/apps/chipcon/chipcon.c index d4e8177..05349ea 100644 --- a/firmware/apps/chipcon/chipcon.c +++ b/firmware/apps/chipcon/chipcon.c @@ -1,17 +1,16 @@ -//GoodFET ChipCon Debugging Application -//Handles basic I/O for the Chipcon 8051 debugging protocol. +/*! \file chipcon.c + \author Travis Goodspeed + \brief Chipcon 8051 debugging. +*/ -//Higher level left to client application. //This is like SPI, except that you read or write, not both. -/** N.B. The READ verb performs a write of all (any) supplied data, +/* N.B. The READ verb performs a write of all (any) supplied data, then reads a single byte reply from the target. The WRITE verb only writes. */ -//This is REALLY untested. - #include "platform.h" #include "command.h" #include "chipcon.h" @@ -21,7 +20,7 @@ #include -/** Concerning clock rates, +/* Concerning clock rates, the maximimum clock rates are defined on page 4 of the spec. They vary, but are roughly 30MHz. Raising this clock rate might allow for clock glitching, but the GoodFET isn't sufficient fast for that. @@ -125,7 +124,7 @@ void ccread(unsigned char len){ //! Handles a monitor command. void cchandle(unsigned char app, unsigned char verb, - unsigned char len){ + unsigned long len){ switch(verb){ //CC_PEEK and CC_POKE will come later. case READ: //Write a command and return 1-byte reply. @@ -217,7 +216,6 @@ void cchandle(unsigned char app, txdata(app,verb,1); break; case CC_SET_PC: - case CC_CLOCK_INIT: case CC_WRITE_FLASH_PAGE: case CC_MASS_ERASE_FLASH: @@ -362,7 +360,7 @@ unsigned char cc_peekcodebyte(unsigned long adr){ //CLR A cc_debug(2, 0xE4, 0, 0); //MOVC A, @A+DPTR; - toret=cc_debug(1, 0x93, 0, 0); + toret=cc_debug(3, 0x93, 0, 0); //INC DPTR //cc_debug(1, 0xA3, 0, 0);