X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fchipcon%2Fchipcon.c;h=7ce22b2479ddd3ed915892e1bcd3d6f74785a994;hp=28bc52b0f2da44df90e42d6781d30a78624fa957;hb=da936efd54c94f9d801ef07bdd08f533dac5b641;hpb=96bf694c533026d571e3fa567edc450ae8a1e24a diff --git a/firmware/apps/chipcon/chipcon.c b/firmware/apps/chipcon/chipcon.c index 28bc52b..7ce22b2 100644 --- a/firmware/apps/chipcon/chipcon.c +++ b/firmware/apps/chipcon/chipcon.c @@ -19,6 +19,27 @@ #include #include +//! Handles a chipcon command. +void cc_handle_fn( uint8_t const app, + uint8_t const verb, + uint32_t const len); + +// define the jtag app's app_t +app_t const chipcon_app = { + + /* app number */ + CHIPCON, + + /* handle fn */ + cc_handle_fn, + + /* name */ + "CHIPCON", + + /* desc */ + "\tThe CHIPCON app adds support for debugging the chipcon\n" + "\t8051 processor.\n" +}; /* Concerning clock rates, the maximimum clock rates are defined on page 4 of the spec. They vary, but are roughly 30MHz. Raising @@ -38,22 +59,23 @@ //This could be more accurate. //Does it ever need to be? #define CCSPEED 3 -#define CCDELAY(x) delay(x) -//#define CCDELAY(x) +//#define CCSPEED 3 +//#define CCDELAY(x) delay(x) +#define CCDELAY(x) -#define SETMOSI P5OUT|=MOSI -#define CLRMOSI P5OUT&=~MOSI -#define SETCLK P5OUT|=SCK -#define CLRCLK P5OUT&=~SCK -#define READMISO (P5IN&MISO?1:0) +#define SETMOSI SPIOUT|=MOSI +#define CLRMOSI SPIOUT&=~MOSI +#define SETCLK SPIOUT|=SCK +#define CLRCLK SPIOUT&=~SCK +#define READMISO (SPIIN&MISO?1:0) -#define CCWRITE P5DIR|=MOSI -#define CCREAD P5DIR&=~MISO +#define CCWRITE SPIDIR|=MOSI +#define CCREAD SPIDIR&=~MISO //! Set up the pins for CC mode. Does not init debugger. void ccsetup(){ - P5OUT|=MOSI+SCK+RST; - P5DIR|=MOSI+SCK+RST; + SPIOUT|=MOSI+SCK+RST; + SPIDIR|=MOSI+SCK+RST; //P5REN=0xFF; } @@ -76,31 +98,31 @@ void ccsetup(){ //! Initialize the debugger void ccdebuginit(){ //Port output BUT NOT DIRECTION is set at start. - P5OUT|=MOSI+SCK+RST; + SPIOUT|=MOSI+SCK+RST; - //delay(30); //So the beginning is ready for glitching. + delay(30); //So the beginning is ready for glitching. //Two positive debug clock pulses while !RST is low. //Take RST low, pulse twice, then high. - P5OUT&=~SCK; + SPIOUT&=~SCK; delay(10); - P5OUT&=~RST; + SPIOUT&=~RST; delay(10); //Two rising edges. - P5OUT^=SCK; //up + SPIOUT^=SCK; //up delay(1); - P5OUT^=SCK; //down + SPIOUT^=SCK; //down delay(1); - P5OUT^=SCK; //up + SPIOUT^=SCK; //up delay(1); - P5OUT^=SCK; //Unnecessary. + SPIOUT^=SCK; //Unnecessary. delay(1); //delay(0); //Raise !RST. - P5OUT|=RST; + SPIOUT|=RST; } //! Read and write a CC bit. @@ -118,11 +140,11 @@ unsigned char cctrans8(unsigned char byte){ byte <<= 1; /* half a clock cycle before leading/rising edge */ - CCDELAY(CCSPEED/2); + CCDELAY(CCSPEED>>2); SETCLK; /* half a clock cycle before trailing/falling edge */ - CCDELAY(CCSPEED/2); + CCDELAY(CCSPEED>>2); /* read MISO on trailing edge */ byte |= READMISO; @@ -148,10 +170,11 @@ void ccread(unsigned char len){ cmddata[i]=cctrans8(0); } -//! Handles a monitor command. -void cchandle(unsigned char app, - unsigned char verb, - unsigned long len){ +//! Handles a chipcon command. +void cc_handle_fn( uint8_t const app, + uint8_t const verb, + uint32_t const len) +{ //Always init. Might help with buggy lines. //Might hurt too. //ccdebuginit(); @@ -184,9 +207,9 @@ void cchandle(unsigned char app, break; case STOP://exit debugger //Take RST low, then high. - P5OUT&=~RST; + SPIOUT&=~RST; CCDELAY(CCSPEED); - P5OUT|=RST; + SPIOUT|=RST; txdata(app,verb,0); break; case SETUP: @@ -240,7 +263,7 @@ void cchandle(unsigned char app, txdata(app,verb,1); break; case CC_STEP_REPLACE: - txdata(app,NOK,0);//TODO add me + txdata(app,NOK,0);//Don't add this; it's non-standard. break; case CC_GET_CHIP_ID: cmddataword[0]=cc_get_chip_id();