X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fchipcon%2Fchipcon.c;h=83bc898a39b7ad4b7fc39f56b558122427e6acaf;hp=c45effc88eea1156efa4a71d44b37fe12ed9719c;hb=ba0e5551e39ee0d35f21cf42dfc8d645dfe63b79;hpb=c120e1b191dde4924b146e94c8e96729204518de diff --git a/firmware/apps/chipcon/chipcon.c b/firmware/apps/chipcon/chipcon.c index c45effc..83bc898 100644 --- a/firmware/apps/chipcon/chipcon.c +++ b/firmware/apps/chipcon/chipcon.c @@ -19,6 +19,27 @@ #include #include +//! Handles a chipcon command. +void cc_handle_fn( uint8_t const app, + uint8_t const verb, + uint32_t const len); + +// define the jtag app's app_t +app_t const chipcon_app = { + + /* app number */ + CHIPCON, + + /* handle fn */ + cc_handle_fn, + + /* name */ + "CHIPCON", + + /* desc */ + "\tThe CHIPCON app adds support for debugging the chipcon\n" + "\t8051 processor.\n" +}; /* Concerning clock rates, the maximimum clock rates are defined on page 4 of the spec. They vary, but are roughly 30MHz. Raising @@ -34,46 +55,73 @@ #define MISO BIT2 #define SCK BIT3 + //This could be more accurate. //Does it ever need to be? #define CCSPEED 3 -#define CCDELAY(x) delay(x) +//#define CCDELAY(x) delay(x) +#define CCDELAY(x) -#define SETMOSI P5OUT|=MOSI -#define CLRMOSI P5OUT&=~MOSI -#define SETCLK P5OUT|=SCK -#define CLRCLK P5OUT&=~SCK -#define READMISO (P5IN&MISO?1:0) +#define SETMOSI SPIOUT|=MOSI +#define CLRMOSI SPIOUT&=~MOSI +#define SETCLK SPIOUT|=SCK +#define CLRCLK SPIOUT&=~SCK +#define READMISO (SPIIN&MISO?1:0) -#define CCWRITE P5DIR|=MOSI -#define CCREAD P5DIR&=~MISO +#define CCWRITE SPIDIR|=MOSI +#define CCREAD SPIDIR&=~MISO //! Set up the pins for CC mode. Does not init debugger. void ccsetup(){ - P5OUT|=MOSI+SCK+RST; - P5DIR|=MOSI+SCK+RST; - //P5DIR&=~MISO; //MOSI is MISO + SPIOUT|=MOSI+SCK+RST; + SPIDIR|=MOSI+SCK+RST; + //P5REN=0xFF; } + +/* 33 cycle critical region +0000000e : + e: f2 d0 0d 00 bis.b #13, &0x0031 ;5 cycles + 12: 31 00 + 14: f2 c2 31 00 bic.b #8, &0x0031 ;4 cycles + 18: d2 c3 31 00 bic.b #1, &0x0031 ;4 + 1c: f2 e2 31 00 xor.b #8, &0x0031 ;4 + 20: f2 e2 31 00 xor.b #8, &0x0031 ;4 + 24: f2 e2 31 00 xor.b #8, &0x0031 ;4 + 28: f2 e2 31 00 xor.b #8, &0x0031 ;4 + 2c: d2 d3 31 00 bis.b #1, &0x0031 ;4 + 30: 30 41 ret +*/ + + //! Initialize the debugger void ccdebuginit(){ + //Port output BUT NOT DIRECTION is set at start. + SPIOUT|=MOSI+SCK+RST; + + //delay(30); //So the beginning is ready for glitching. + //Two positive debug clock pulses while !RST is low. //Take RST low, pulse twice, then high. - P5OUT&=~SCK; - P5OUT&=~RST; - - //pulse twice - CCDELAY(CCSPEED); - P5OUT|=SCK; //up - CCDELAY(CCSPEED); - P5OUT&=~SCK; //down - CCDELAY(CCSPEED); - P5OUT|=SCK; //up - CCDELAY(CCSPEED); - P5OUT&=~SCK; //down + SPIOUT&=~SCK; + delay(10); + SPIOUT&=~RST; + + delay(10); + + //Two rising edges. + SPIOUT^=SCK; //up + delay(1); + SPIOUT^=SCK; //down + delay(1); + SPIOUT^=SCK; //up + delay(1); + SPIOUT^=SCK; //Unnecessary. + delay(1); + //delay(0); //Raise !RST. - P5OUT|=RST; + SPIOUT|=RST; } //! Read and write a CC bit. @@ -121,14 +169,16 @@ void ccread(unsigned char len){ cmddata[i]=cctrans8(0); } -//! Handles a monitor command. -void cchandle(unsigned char app, - unsigned char verb, - unsigned long len){ +//! Handles a chipcon command. +void cc_handle_fn( uint8_t const app, + uint8_t const verb, + uint32_t const len) +{ //Always init. Might help with buggy lines. //Might hurt too. //ccdebuginit(); long i; + int blocklen, blockadr; switch(verb){ //CC_PEEK and CC_POKE will come later. @@ -145,22 +195,20 @@ void cchandle(unsigned char app, if(cmddata[0]&0x4) ccread(1); txdata(app,verb,1); - break; case WRITE: //Write a command with no reply. cccmd(len); txdata(app,verb,0); break; case START://enter debugger - ccsetup(); ccdebuginit(); txdata(app,verb,0); break; case STOP://exit debugger //Take RST low, then high. - P5OUT&=~RST; + SPIOUT&=~RST; CCDELAY(CCSPEED); - P5OUT|=RST; + SPIOUT|=RST; txdata(app,verb,0); break; case SETUP: @@ -170,6 +218,7 @@ void cchandle(unsigned char app, //Micro commands! case CC_CHIP_ERASE: + case CC_MASS_ERASE_FLASH: cc_chip_erase(); txdata(app,verb,1); break; @@ -227,9 +276,18 @@ void cchandle(unsigned char app, txdata(app,verb,1); break; case CC_READ_XDATA_MEMORY: - cmddata[0]=cc_peekdatabyte(cmddataword[0]); - txdata(app,verb,1); + //Read the length. + blocklen=1; + if(len>2) + blocklen=cmddataword[1]; + blockadr=cmddataword[0]; + + //Return that many bytes. + for(i=0;i