X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fchipcon%2Fchipcon.c;h=89f12b98d4a8fab1c783a0712aef454208edc427;hp=1f4b3d475da63f70282c7b0559c344c0fd35aca8;hb=5fb0341d348e101b30794945a6c91546e25e8e7b;hpb=f515b7a8aae68363cba997f8581001401e70054b

diff --git a/firmware/apps/chipcon/chipcon.c b/firmware/apps/chipcon/chipcon.c
index 1f4b3d4..89f12b9 100644
--- a/firmware/apps/chipcon/chipcon.c
+++ b/firmware/apps/chipcon/chipcon.c
@@ -19,6 +19,27 @@
 #include <io.h>
 #include <iomacros.h>
 
+//! Handles a chipcon command.
+void cc_handle_fn( uint8_t const app,
+				   uint8_t const verb,
+				   uint32_t const len);
+
+// define the jtag app's app_t
+app_t const chipcon_app = {
+
+	/* app number */
+	CHIPCON,
+
+	/* handle fn */
+	cc_handle_fn,
+
+	/* name */
+	"CHIPCON",
+
+	/* desc */
+	"\tThe CHIPCON app adds support for debugging the chipcon\n"
+	"\t8051 processor.\n"
+};
 
 /* Concerning clock rates, the maximimum clock rates are defined on
    page 4 of the spec.  They vary, but are roughly 30MHz.  Raising
@@ -34,11 +55,12 @@
 #define MISO BIT2
 #define SCK  BIT3
 
+
 //This could be more accurate.
 //Does it ever need to be?
 #define CCSPEED 3
-//#define CCDELAY(x) delay(x)
-#define CCDELAY(x) 
+#define CCDELAY(x) delay(x)
+//#define CCDELAY(x) 
 
 #define SETMOSI P5OUT|=MOSI
 #define CLRMOSI P5OUT&=~MOSI
@@ -56,6 +78,22 @@ void ccsetup(){
   //P5REN=0xFF;
 }
 
+
+/* 33 cycle critical region
+0000000e <ccdebuginit>:
+   e:	f2 d0 0d 00 	bis.b	#13,	&0x0031	;5 cycles
+  12:	31 00 
+  14:	f2 c2 31 00 	bic.b	#8,	&0x0031	;4 cycles
+  18:	d2 c3 31 00 	bic.b	#1,	&0x0031	;4
+  1c:	f2 e2 31 00 	xor.b	#8,	&0x0031	;4
+  20:	f2 e2 31 00 	xor.b	#8,	&0x0031	;4
+  24:	f2 e2 31 00 	xor.b	#8,	&0x0031	;4
+  28:	f2 e2 31 00 	xor.b	#8,	&0x0031	;4
+  2c:	d2 d3 31 00 	bis.b	#1,	&0x0031	;4
+  30:	30 41       	ret			
+*/
+
+
 //! Initialize the debugger
 void ccdebuginit(){
   //Port output BUT NOT DIRECTION is set at start.
@@ -66,14 +104,21 @@ void ccdebuginit(){
   //Two positive debug clock pulses while !RST is low.
   //Take RST low, pulse twice, then high.
   P5OUT&=~SCK;
+  delay(10);
   P5OUT&=~RST;
   
+  delay(10);
+  
   //Two rising edges.
   P5OUT^=SCK; //up
+  delay(1);
   P5OUT^=SCK; //down
+  delay(1);
   P5OUT^=SCK; //up
+  delay(1);
   P5OUT^=SCK; //Unnecessary.
-  
+  delay(1);
+  //delay(0);
   
   //Raise !RST.
   P5OUT|=RST;
@@ -124,14 +169,16 @@ void ccread(unsigned char len){
     cmddata[i]=cctrans8(0);
 }
 
-//! Handles a monitor command.
-void cchandle(unsigned char app,
-	       unsigned char verb,
-	       unsigned long len){
+//! Handles a chipcon command.
+void cc_handle_fn( uint8_t const app,
+				   uint8_t const verb,
+				   uint32_t const len)
+{
   //Always init.  Might help with buggy lines.
   //Might hurt too.
   //ccdebuginit();
   long i;
+  int blocklen, blockadr;
   
   switch(verb){
     //CC_PEEK and CC_POKE will come later.
@@ -171,6 +218,7 @@ void cchandle(unsigned char app,
     
   //Micro commands!
   case CC_CHIP_ERASE:
+  case CC_MASS_ERASE_FLASH:
     cc_chip_erase();
     txdata(app,verb,1);
     break;
@@ -228,9 +276,18 @@ void cchandle(unsigned char app,
     txdata(app,verb,1);
     break;
   case CC_READ_XDATA_MEMORY:
-    cmddata[0]=cc_peekdatabyte(cmddataword[0]);
-    txdata(app,verb,1);
+    //Read the length.
+    blocklen=1;
+    if(len>2)
+      blocklen=cmddataword[1];
+    blockadr=cmddataword[0];
+    
+    //Return that many bytes.
+    for(i=0;i<blocklen;i++)
+      cmddata[i]=cc_peekdatabyte(blockadr+i);
+    txdata(app,verb,blocklen);
     break;
+    
   case CC_WRITE_XDATA_MEMORY:
     cmddata[0]=cc_pokedatabyte(cmddataword[0], cmddata[2]);
     txdata(app,verb,1);
@@ -248,9 +305,10 @@ void cchandle(unsigned char app,
       cc_pokedatabyte(i,0xFF);
     txdata(app,verb,0);
     break;
-  case CC_MASS_ERASE_FLASH:
+  
   case CC_CLOCK_INIT:
   case CC_PROGRAM_FLASH:
+  default:
     debugstr("This Chipcon command is not yet implemented.");
     txdata(app,NOK,0);//TODO implement me.
     break;
@@ -328,13 +386,16 @@ unsigned short cc_get_chip_id(){
   //Find the flash word size.
   switch(cmddata[0]){
   case 0x01://CC1110
+  case 0x11://CC1111
   case 0x81://CC2510
   case 0x91://CC2511
-    flash_word_size=0x02;
     //debugstr("2 bytes/flash word");
+    flash_word_size=0x02;
     break;
   default:
-    debugstr("Warning: Guessing flash word size.");
+    //debugstr("Warning: Guessing flash word size.");
+    //flash_word_size=0;
+    break;
   case 0x85://CC2430
   case 0x89://CC2431
     //debugstr("4 bytes/flash word");
@@ -439,8 +500,9 @@ void cc_write_flash_page(u32 adr){
     return;
   }
   
-  if(flash_word_size==0){
-    debugstr("Flash word size is wrong.");
+  if(flash_word_size!=2 && flash_word_size!=4){
+    debugstr("Flash word size is wrong, aborting write to");
+    debughex(adr);
     while(1);
   }
   
@@ -459,8 +521,7 @@ void cc_write_flash_page(u32 adr){
 		  flash_word_size);
   
   //debugstr("Wrote flash routine.");
-  
-  
+    
   //MOV MEMCTR, (bank * 16) + 1;
   cmddata[0]=0x75;
   cmddata[1]=0xc7;
@@ -475,13 +536,13 @@ void cc_write_flash_page(u32 adr){
   
   
   while(!(cc_read_status()&CC_STATUS_CPUHALTED)){
-    P1OUT^=1;//blink LED while flashing
+    PLEDOUT^=PLEDPIN;//blink LED while flashing    
   }
   
   
   //debugstr("Done flashing.");
   
-  P1OUT&=~1;//clear LED
+  PLEDOUT&=~PLEDPIN;//clear LED
 }
 
 //! Read the PC