X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fchipcon%2Fchipcon.c;h=d2f70ac9cb1d920b6d9ca7950e86f2a2a0c9fc42;hp=6c910e725d4b52e87ec106fda3f8ff4282c7002c;hb=65c39b80a197663ed494ea6887159b0efe7116a1;hpb=d9b3b0d57da47a1736a6af0a10b5fa96a03fe6e0

diff --git a/firmware/apps/chipcon/chipcon.c b/firmware/apps/chipcon/chipcon.c
index 6c910e7..d2f70ac 100644
--- a/firmware/apps/chipcon/chipcon.c
+++ b/firmware/apps/chipcon/chipcon.c
@@ -37,7 +37,8 @@
 //This could be more accurate.
 //Does it ever need to be?
 #define CCSPEED 3
-#define CCDELAY(x) delay(x)
+//#define CCDELAY(x) delay(x)
+#define CCDELAY(x) 
 
 #define SETMOSI P5OUT|=MOSI
 #define CLRMOSI P5OUT&=~MOSI
@@ -52,25 +53,43 @@
 void ccsetup(){
   P5OUT|=MOSI+SCK+RST;
   P5DIR|=MOSI+SCK+RST;
-  //P5DIR&=~MISO;  //MOSI is MISO
+  //P5REN=0xFF;
 }
 
+
+/* 33 cycle critical region
+0000000e <ccdebuginit>:
+   e:	f2 d0 0d 00 	bis.b	#13,	&0x0031	;5 cycles
+  12:	31 00 
+  14:	f2 c2 31 00 	bic.b	#8,	&0x0031	;4 cycles
+  18:	d2 c3 31 00 	bic.b	#1,	&0x0031	;4
+  1c:	f2 e2 31 00 	xor.b	#8,	&0x0031	;4
+  20:	f2 e2 31 00 	xor.b	#8,	&0x0031	;4
+  24:	f2 e2 31 00 	xor.b	#8,	&0x0031	;4
+  28:	f2 e2 31 00 	xor.b	#8,	&0x0031	;4
+  2c:	d2 d3 31 00 	bis.b	#1,	&0x0031	;4
+  30:	30 41       	ret			
+*/
+
+
 //! Initialize the debugger
 void ccdebuginit(){
+  //Port output BUT NOT DIRECTION is set at start.
+  P5OUT|=MOSI+SCK+RST;
+  
+  //delay(30); //So the beginning is ready for glitching.
+  
   //Two positive debug clock pulses while !RST is low.
   //Take RST low, pulse twice, then high.
   P5OUT&=~SCK;
   P5OUT&=~RST;
   
-  //pulse twice
-  CCDELAY(CCSPEED);
-  P5OUT|=SCK;  //up
-  CCDELAY(CCSPEED);
-  P5OUT&=~SCK; //down
-  CCDELAY(CCSPEED);
-  P5OUT|=SCK;  //up
-  CCDELAY(CCSPEED);
-  P5OUT&=~SCK; //down
+  //Two rising edges.
+  P5OUT^=SCK; //up
+  P5OUT^=SCK; //down
+  P5OUT^=SCK; //up
+  P5OUT^=SCK; //Unnecessary.
+  
   
   //Raise !RST.
   P5OUT|=RST;
@@ -145,14 +164,12 @@ void cchandle(unsigned char app,
     if(cmddata[0]&0x4)
       ccread(1);
     txdata(app,verb,1);
-    
     break;
   case WRITE: //Write a command with no reply.
     cccmd(len);
     txdata(app,verb,0);
     break;
   case START://enter debugger
-    ccsetup();
     ccdebuginit();
     txdata(app,verb,0);
     break;
@@ -327,13 +344,16 @@ unsigned short cc_get_chip_id(){
   //Find the flash word size.
   switch(cmddata[0]){
   case 0x01://CC1110
+  case 0x11://CC1111
   case 0x81://CC2510
   case 0x91://CC2511
-    flash_word_size=0x02;
     //debugstr("2 bytes/flash word");
+    flash_word_size=0x02;
     break;
   default:
-    debugstr("Warning: Guessing flash word size.");
+    //debugstr("Warning: Guessing flash word size.");
+    //flash_word_size=0;
+    break;
   case 0x85://CC2430
   case 0x89://CC2431
     //debugstr("4 bytes/flash word");
@@ -438,8 +458,9 @@ void cc_write_flash_page(u32 adr){
     return;
   }
   
-  if(flash_word_size==0){
-    debugstr("Flash word size is wrong.");
+  if(flash_word_size!=2 && flash_word_size!=4){
+    debugstr("Flash word size is wrong, aborting write to");
+    debughex(adr);
     while(1);
   }
   
@@ -458,29 +479,28 @@ void cc_write_flash_page(u32 adr){
 		  flash_word_size);
   
   //debugstr("Wrote flash routine.");
-  
-  
+    
   //MOV MEMCTR, (bank * 16) + 1;
   cmddata[0]=0x75;
   cmddata[1]=0xc7;
   cmddata[2]=0x51;
   cc_debug_instr(3);
-  debugstr("Loaded bank info.");
+  //debugstr("Loaded bank info.");
   
   cc_set_pc(0xf000+MAXFLASHPAGE_SIZE);//execute code fragment
   cc_resume();
   
-  debugstr("Executing.");
+  //debugstr("Executing.");
   
   
   while(!(cc_read_status()&CC_STATUS_CPUHALTED)){
-    P1OUT^=1;//blink LED while flashing
+    PLEDOUT^=PLEDPIN;//blink LED while flashing    
   }
   
   
-  debugstr("Done flashing.");
+  //debugstr("Done flashing.");
   
-  P1OUT&=~1;//clear LED
+  PLEDOUT&=~PLEDPIN;//clear LED
 }
 
 //! Read the PC