X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fjtag%2Fjtag430.c;h=469e03c04fe77fb13a0661631f4c5eb99cf9f8cf;hp=35874a897e797c21fd22b77547f33aa5f5829498;hb=200cf8b44b4f39dfb975bac6fae35543b2c9c51a;hpb=1c1abaa53f950a77dd7e71b2b354e3de0046313b diff --git a/firmware/apps/jtag/jtag430.c b/firmware/apps/jtag/jtag430.c index 35874a8..469e03c 100644 --- a/firmware/apps/jtag/jtag430.c +++ b/firmware/apps/jtag/jtag430.c @@ -5,28 +5,36 @@ #include "platform.h" #include "command.h" -#include "jtag.h" +#include "jtag430.h" unsigned int jtag430mode=MSP430X2MODE; -//! Set the program counter. -void jtag430_setpc(unsigned int adr){ +//! Set a register. +void jtag430_setr(u8 reg, u16 val){ jtag_ir_shift8(IR_CNTRL_SIG_16BIT); jtag_dr_shift16(0x3401);// release low byte jtag_ir_shift8(IR_DATA_16BIT); - jtag_dr_shift16(0x4030);//Instruction to load PC + + //0x4030 is "MOV #foo, r0" + //Right-most field is register, so 0x4035 loads r5 + jtag_dr_shift16(0x4030+reg); CLRTCLK; SETTCLK; - jtag_dr_shift16(adr);// Value for PC + jtag_dr_shift16(val);// Value for the register CLRTCLK; jtag_ir_shift8(IR_ADDR_CAPTURE); SETTCLK; - CLRTCLK ;// Now PC is set to "PC_Value" + CLRTCLK ;// Now reg is set to new value. jtag_ir_shift8(IR_CNTRL_SIG_16BIT); jtag_dr_shift16(0x2401);// low byte controlled by JTAG } +//! Set the program counter. +void jtag430_setpc(unsigned int adr){ + jtag430_setr(0,adr); +} + //! Halt the CPU void jtag430_haltcpu(){ //jtag430_setinstrfetch(); @@ -43,9 +51,14 @@ void jtag430_haltcpu(){ //! Release the CPU void jtag430_releasecpu(){ CLRTCLK; + //debugstr("Releasing target MSP430."); + + /* jtag_ir_shift8(IR_CNTRL_SIG_16BIT); - jtag_dr_shift16(0x2401); - jtag_ir_shift8(IR_ADDR_CAPTURE); + jtag_dr_shift16(0x2C01); //Apply reset. + jtag_dr_shift16(0x2401); //Release reset. + */ + jtag_ir_shift8(IR_CNTRL_SIG_RELEASE); SETTCLK; } @@ -62,7 +75,7 @@ unsigned int jtag430_readmem(unsigned int adr){ else jtag_dr_shift16(0x2419);//byte read jtag_ir_shift8(IR_ADDR_16BIT); - jtag_dr_shift16(adr);//address + jtag_dr_shiftadr(adr);//address jtag_ir_shift8(IR_DATA_TO_ADDR); SETTCLK; @@ -81,7 +94,7 @@ void jtag430_writemem(unsigned int adr, unsigned int data){ else jtag_dr_shift16(0x2418);//byte write jtag_ir_shift8(IR_ADDR_16BIT); - jtag_dr_shift16(adr); + jtag_dr_shiftadr(adr); jtag_ir_shift8(IR_DATA_TO_ADDR); jtag_dr_shift16(data); SETTCLK; @@ -94,7 +107,7 @@ void jtag430_writeflashword(unsigned int adr, unsigned int data){ jtag_ir_shift8(IR_CNTRL_SIG_16BIT); jtag_dr_shift16(0x2408);//word write jtag_ir_shift8(IR_ADDR_16BIT); - jtag_dr_shift16(adr); + jtag_dr_shiftadr(adr); jtag_ir_shift8(IR_DATA_TO_ADDR); jtag_dr_shift16(data); SETTCLK; @@ -125,6 +138,7 @@ void jtag430_writeflash(unsigned int adr, unsigned int data){ jtag430_writemem(0x012A, 0xA540); //FCTL3=0xA500, should be 0xA540 for Info Seg A on 2xx chips. jtag430_writemem(0x012C, 0xA500); //all but info flash. + //if(jtag430_readmem(0x012C)); //Write the word itself. jtag430_writeflashword(adr,data); @@ -165,7 +179,8 @@ void jtag430_por(){ #define ERASE_SGMT 0xA502 //! Configure flash, then write a word. -void jtag430_eraseflash(unsigned int mode, unsigned int adr, unsigned int count){ +void jtag430_eraseflash(unsigned int mode, unsigned int adr, unsigned int count, + unsigned int info){ jtag430_haltcpu(); //FCTL1= erase mode @@ -173,7 +188,10 @@ void jtag430_eraseflash(unsigned int mode, unsigned int adr, unsigned int count) //FCTL2=0xA540, selecting MCLK as source, DIV=1 jtag430_writemem(0x012A, 0xA540); //FCTL3=0xA500, should be 0xA540 for Info Seg A on 2xx chips. - jtag430_writemem(0x012C, 0xA500); + if(info) + jtag430_writemem(0x012C, 0xA540); + else + jtag430_writemem(0x012C, 0xA500); //Write the erase word. jtag430_writemem(adr, 0x55AA); @@ -199,19 +217,17 @@ void jtag430_resettap(){ SETTDI; //430X2 SETTMS; //SETTDI; //classic - SETTCK; + TCKTOCK; // Navigate to reset state. // Should be at least six. for(i=0;i<4;i++){ - CLRTCK; - SETTCK; + TCKTOCK; } // test-logic-reset - CLRTCK; CLRTMS; - SETTCK; + TCKTOCK; SETTMS; // idle @@ -238,7 +254,9 @@ void jtag430_start(){ SETTST; SETRST; delay(0xFFFF); - + + + #ifndef SBWREWRITE //Entry sequence from Page 67 of SLAU265A for 4-wire MSP430 JTAG CLRRST; delay(100); //100 @@ -249,6 +267,7 @@ void jtag430_start(){ SETRST; P5DIR&=~RST; delay(0xFFFF); + #endif //Perform a reset and disable watchdog. jtag430_por(); @@ -257,7 +276,7 @@ void jtag430_start(){ jtag430_haltcpu(); } -//! Start normally, not JTAG. +//! Stop JTAG. void jtag430_stop(){ debugstr("Exiting JTAG."); jtagsetup(); @@ -300,8 +319,6 @@ void jtag430handle(unsigned char app, unsigned long at; unsigned int i, val; - //debugstr("Classic MSP430 handler."); - /* FIXME * Sometimes JTAG doesn't init correctly. @@ -310,11 +327,13 @@ void jtag430handle(unsigned char app, * for testing server. */ while((i=jtag430_readmem(0xff0))==0xFFFF){ + debugstr("Reconnecting to target MSP430."); jtag430_start(); - P1OUT^=1; + PLEDOUT^=PLEDPIN; } - P1OUT&=~1; - + PLEDOUT&=~PLEDPIN; + + switch(verb){ case START: //Enter JTAG mode. @@ -322,7 +341,9 @@ void jtag430handle(unsigned char app, //TAP setup, fuse check jtag430_resettap(); - txdata(app,verb,0); + cmddata[0]=jtag_ir_shift8(IR_BYPASS); + txdata(app,verb,1); + break; case STOP: jtag430_stop(); @@ -402,15 +423,31 @@ void jtag430handle(unsigned char app, txdata(app,verb,2); break; case JTAG430_ERASEFLASH: - jtag430_eraseflash(ERASE_MASS,0xFFFE,0x3000); + jtag430_eraseflash(ERASE_MASS,0xFFFE,0x3000,0); + txdata(app,verb,0); + break; + case JTAG430_ERASEINFO: + jtag430_eraseflash(ERASE_SGMT,0x1000,0x3000,1); txdata(app,verb,0); break; case JTAG430_SETPC: jtag430_haltcpu(); + //debughex("Setting PC."); + //debughex(cmddataword[0]); jtag430_setpc(cmddataword[0]); + jtag430_releasecpu(); txdata(app,verb,0); break; - + case JTAG430_SETREG: + jtag430_setr(cmddata[0],cmddataword[1]); + txdata(app,verb,0); + break; + case JTAG430_GETREG: + //jtag430_getr(cmddata[0]); + debugstr("JTAG430_GETREG not yet implemented."); + cmddataword[0]=0xDEAD; + txdata(app,verb,2); + break; case JTAG430_COREIP_ID: case JTAG430_DEVICE_ID: cmddataword[0]=0;