X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fjtag%2Fjtag430.c;h=8e6fe03e484f19be2ad2eef2ebb6fa7a37a25369;hp=f98cc5f27195557ed4375a2ebe047e46e0926b4c;hb=69539bb167246135b1bde3c55dca7d19bc3c7aee;hpb=386bb6b2c16f5d729a49e8eb8f42bbfad6a42d10 diff --git a/firmware/apps/jtag/jtag430.c b/firmware/apps/jtag/jtag430.c index f98cc5f..8e6fe03 100644 --- a/firmware/apps/jtag/jtag430.c +++ b/firmware/apps/jtag/jtag430.c @@ -7,27 +7,66 @@ #include "command.h" #include "jtag430.h" +//! Handles classic MSP430 JTAG commands. Forwards others to JTAG. +void jtag430_handle_fn(uint8_t const app, + uint8_t const verb, + uint32_t const len); + +// define the jtag430 app's app_t +app_t const jtag430_app = { + /* app number */ + JTAG430, + + /* handle fn */ + jtag430_handle_fn, + + /* name */ + "JTAG430", + + /* desc */ + "\tThe JTAG430 app adds to the basic JTAG app\n" + "\tsupport for JTAG'ing MSP430 devices.\n" +}; unsigned int jtag430mode=MSP430X2MODE; +unsigned int drwidth=16; + +//! Shift an address width of data +uint32_t jtag430_shift_addr( uint32_t addr ) +{ + if (!in_run_test_idle()) + { + debugstr("Not in run-test-idle state"); + return 0; + } + + // get intot the right state + jtag_capture_dr(); + jtag_shift_register(); + + // shift DR, then idle + return jtag_trans_n(addr, drwidth, MSB); +} + //! Set a register. void jtag430_setr(u8 reg, u16 val){ - jtag_ir_shift8(IR_CNTRL_SIG_16BIT); - jtag_dr_shift16(0x3401);// release low byte - jtag_ir_shift8(IR_DATA_16BIT); + jtag_ir_shift_8(IR_CNTRL_SIG_16BIT); + jtag_dr_shift_16(0x3401);// release low byte + jtag_ir_shift_8(IR_DATA_16BIT); //0x4030 is "MOV #foo, r0" //Right-most field is register, so 0x4035 loads r5 - jtag_dr_shift16(0x4030+reg); + jtag_dr_shift_16(0x4030+reg); CLRTCLK; SETTCLK; - jtag_dr_shift16(val);// Value for the register + jtag_dr_shift_16(val);// Value for the register CLRTCLK; - jtag_ir_shift8(IR_ADDR_CAPTURE); + jtag_ir_shift_8(IR_ADDR_CAPTURE); SETTCLK; CLRTCLK ;// Now reg is set to new value. - jtag_ir_shift8(IR_CNTRL_SIG_16BIT); - jtag_dr_shift16(0x2401);// low byte controlled by JTAG + jtag_ir_shift_8(IR_CNTRL_SIG_16BIT); + jtag_dr_shift_16(0x2401);// low byte controlled by JTAG } //! Set the program counter. @@ -39,12 +78,12 @@ void jtag430_setpc(unsigned int adr){ void jtag430_haltcpu(){ //jtag430_setinstrfetch(); - jtag_ir_shift8(IR_DATA_16BIT); - jtag_dr_shift16(0x3FFF);//JMP $+0 + jtag_ir_shift_8(IR_DATA_16BIT); + jtag_dr_shift_16(0x3FFF);//JMP $+0 CLRTCLK; - jtag_ir_shift8(IR_CNTRL_SIG_16BIT); - jtag_dr_shift16(0x2409);//set JTAG_HALT bit + jtag_ir_shift_8(IR_CNTRL_SIG_16BIT); + jtag_dr_shift_16(0x2409);//set JTAG_HALT bit SETTCLK; } @@ -54,11 +93,11 @@ void jtag430_releasecpu(){ //debugstr("Releasing target MSP430."); /* - jtag_ir_shift8(IR_CNTRL_SIG_16BIT); - jtag_dr_shift16(0x2C01); //Apply reset. - jtag_dr_shift16(0x2401); //Release reset. + jtag_ir_shift_8(IR_CNTRL_SIG_16BIT); + jtag_dr_shift_16(0x2C01); //Apply reset. + jtag_dr_shift_16(0x2401); //Release reset. */ - jtag_ir_shift8(IR_CNTRL_SIG_RELEASE); + jtag_ir_shift_8(IR_CNTRL_SIG_RELEASE); SETTCLK; } @@ -68,19 +107,19 @@ unsigned int jtag430_readmem(unsigned int adr){ jtag430_haltcpu(); CLRTCLK; - jtag_ir_shift8(IR_CNTRL_SIG_16BIT); + jtag_ir_shift_8(IR_CNTRL_SIG_16BIT); if(adr>0xFF) - jtag_dr_shift16(0x2409);//word read + jtag_dr_shift_16(0x2409);//word read else - jtag_dr_shift16(0x2419);//byte read - jtag_ir_shift8(IR_ADDR_16BIT); - jtag_dr_shiftadr(adr);//address - jtag_ir_shift8(IR_DATA_TO_ADDR); + jtag_dr_shift_16(0x2419);//byte read + jtag_ir_shift_8(IR_ADDR_16BIT); + jtag430_shift_addr(adr);//address + jtag_ir_shift_8(IR_DATA_TO_ADDR); SETTCLK; CLRTCLK; - toret=jtag_dr_shift16(0x0000);//16 bit return + toret=jtag_dr_shift_16(0x0000);//16 bit return return toret; } @@ -88,15 +127,15 @@ unsigned int jtag430_readmem(unsigned int adr){ //! Write data to address. void jtag430_writemem(unsigned int adr, unsigned int data){ CLRTCLK; - jtag_ir_shift8(IR_CNTRL_SIG_16BIT); + jtag_ir_shift_8(IR_CNTRL_SIG_16BIT); if(adr>0xFF) - jtag_dr_shift16(0x2408);//word write + jtag_dr_shift_16(0x2408);//word write else - jtag_dr_shift16(0x2418);//byte write - jtag_ir_shift8(IR_ADDR_16BIT); - jtag_dr_shiftadr(adr); - jtag_ir_shift8(IR_DATA_TO_ADDR); - jtag_dr_shift16(data); + jtag_dr_shift_16(0x2418);//byte write + jtag_ir_shift_8(IR_ADDR_16BIT); + jtag430_shift_addr(adr); + jtag_ir_shift_8(IR_DATA_TO_ADDR); + jtag_dr_shift_16(data); SETTCLK; } @@ -104,24 +143,24 @@ void jtag430_writemem(unsigned int adr, unsigned int data){ void jtag430_writeflashword(unsigned int adr, unsigned int data){ CLRTCLK; - jtag_ir_shift8(IR_CNTRL_SIG_16BIT); - jtag_dr_shift16(0x2408);//word write - jtag_ir_shift8(IR_ADDR_16BIT); - jtag_dr_shiftadr(adr); - jtag_ir_shift8(IR_DATA_TO_ADDR); - jtag_dr_shift16(data); + jtag_ir_shift_8(IR_CNTRL_SIG_16BIT); + jtag_dr_shift_16(0x2408);//word write + jtag_ir_shift_8(IR_ADDR_16BIT); + jtag430_shift_addr(adr); + jtag_ir_shift_8(IR_DATA_TO_ADDR); + jtag_dr_shift_16(data); SETTCLK; //Return to read mode. CLRTCLK; - jtag_ir_shift8(IR_CNTRL_SIG_16BIT); - jtag_dr_shift16(0x2409); + jtag_ir_shift_8(IR_CNTRL_SIG_16BIT); + jtag_dr_shift_16(0x2409); /* jtag430_writemem(adr,data); CLRTCLK; - jtag_ir_shift8(IR_CNTRL_SIG_16BIT); - jtag_dr_shift16(0x2409); + jtag_ir_shift_8(IR_CNTRL_SIG_16BIT); + jtag_dr_shift_16(0x2409); */ //Pulse TCLK @@ -153,18 +192,16 @@ void jtag430_writeflash(unsigned int adr, unsigned int data){ //! Power-On Reset void jtag430_por(){ - unsigned int jtagid; - // Perform Reset - jtag_ir_shift8(IR_CNTRL_SIG_16BIT); - jtag_dr_shift16(0x2C01); // apply - jtag_dr_shift16(0x2401); // remove + jtag_ir_shift_8(IR_CNTRL_SIG_16BIT); + jtag_dr_shift_16(0x2C01); // apply + jtag_dr_shift_16(0x2401); // remove CLRTCLK; SETTCLK; CLRTCLK; SETTCLK; CLRTCLK; - jtagid = jtag_ir_shift8(IR_ADDR_CAPTURE); // get JTAG identifier + jtagid = jtag_ir_shift_8(IR_ADDR_CAPTURE); // get JTAG identifier SETTCLK; jtag430_writemem(0x0120, 0x5A80); // Diabled Watchdog @@ -197,8 +234,8 @@ void jtag430_eraseflash(unsigned int mode, unsigned int adr, unsigned int count, jtag430_writemem(adr, 0x55AA); //Return to read mode. CLRTCLK; - jtag_ir_shift8(IR_CNTRL_SIG_16BIT); - jtag_dr_shift16(0x2409); + jtag_ir_shift_8(IR_CNTRL_SIG_16BIT); + jtag_dr_shift_16(0x2409); //Send the pulses. jtag430_tclk_flashpulses(count); @@ -217,17 +254,17 @@ void jtag430_resettap(){ SETTDI; //430X2 SETTMS; //SETTDI; //classic - TCKTOCK; + jtag_tcktock(); // Navigate to reset state. // Should be at least six. for(i=0;i<4;i++){ - TCKTOCK; + jtag_tcktock(); } // test-logic-reset CLRTMS; - TCKTOCK; + jtag_tcktock(); SETTMS; // idle @@ -245,9 +282,49 @@ void jtag430_resettap(){ } + +//! Get the JTAG ID +unsigned char jtag430x2_jtagid(){ + jtag430_resettap(); + jtagid = jtag_ir_shift_8(IR_BYPASS); + if(jtagid!=0x89 && jtagid!=0x91){ + debugstr("Unknown JTAG ID"); + debughex(jtagid); + } + return jtagid; +} +//! Start JTAG, take pins +unsigned char jtag430x2_start(){ + jtag_setup(); + + //Known-good starting position. + //Might be unnecessary. + SETTST; + SETRST; + + delay(0xFFFF); + + //Entry sequence from Page 67 of SLAU265A for 4-wire MSP430 JTAG + CLRRST; + delay(20);//10 + CLRTST; + + delay(10);//5 + SETTST; + msdelay(10);//5 + SETRST; + P5DIR&=~RST; + + delay(0xFFFF); + + //Perform a reset and disable watchdog. + return jtag430x2_jtagid(); +} + + //! Start JTAG, take pins void jtag430_start(){ - jtagsetup(); + jtag_setup(); //Known-good starting position. //Might be unnecessary. @@ -279,7 +356,7 @@ void jtag430_start(){ //! Stop JTAG. void jtag430_stop(){ debugstr("Exiting JTAG."); - jtagsetup(); + jtag_setup(); //Known-good starting position. //Might be unnecessary. @@ -300,11 +377,11 @@ void jtag430_stop(){ //! Set CPU to Instruction Fetch void jtag430_setinstrfetch(){ - jtag_ir_shift8(IR_CNTRL_SIG_CAPTURE); + jtag_ir_shift_8(IR_CNTRL_SIG_CAPTURE); // Wait until instruction fetch state. while(1){ - if (jtag_dr_shift16(0x0000) & 0x0080) + if (jtag_dr_shift_16(0x0000) & 0x0080) return; CLRTCLK; SETTCLK; @@ -312,15 +389,17 @@ void jtag430_setinstrfetch(){ } + + + //! Handles classic MSP430 JTAG commands. Forwards others to JTAG. -void jtag430handle(unsigned char app, - unsigned char verb, - unsigned long len){ - unsigned long at; +void jtag430_handle_fn(uint8_t const app, + uint8_t const verb, + uint32_t const len) +{ + unsigned long at, l; unsigned int i, val; - //debugstr("Classic MSP430 handler."); - /* FIXME * Sometimes JTAG doesn't init correctly. @@ -328,23 +407,42 @@ void jtag430handle(unsigned char app, * chip ID cannot be read. Should print warning * for testing server. */ - while((i=jtag430_readmem(0xff0))==0xFFFF){ - debugstr("Reconnecting to target MSP430."); - jtag430_start(); - PLEDOUT^=PLEDPIN; - } - PLEDOUT&=~PLEDPIN; + if (jtagid!=0) + while((i=jtag430_readmem(0xff0))==0xFFFF){ + debugstr("Reconnecting to target MSP430."); + jtag430x2_start(); + led_toggle(); + } + led_off(); switch(verb){ case START: - //Enter JTAG mode. - jtag430_start(); - //TAP setup, fuse check - jtag430_resettap(); + debugstr("Using JTAG430 (instead of JTAG430X2)!"); + + jtag430x2_start(); + cmddata[0]=jtagid; + + jtag430mode=MSP430MODE; + + /* So the way this works is that a width of 20 does some + backward-compatibility finagling, causing the correct value + to be exchanged for addresses on 16-bit chips as well as the + new MSP430X chips. (This has only been verified on the + MSP430F2xx family. TODO verify for others.) + */ + + drwidth=20; - cmddata[0]=jtag_ir_shift8(IR_BYPASS); + //Perform a reset and disable watchdog. + jtag430_por(); + jtag430_writemem(0x120,0x5a80);//disable watchdog + + jtag430_haltcpu(); + + jtag430_resettap(); txdata(app,verb,1); + break; case STOP: @@ -371,13 +469,13 @@ void jtag430handle(unsigned char app, //Fetch large blocks for bulk fetches, //small blocks for individual peeks. if(len>5) - len=(cmddataword[2]);//always even. + l=(cmddataword[2]);//always even. else - len=2; - len&=~1;//clear lsbit + l=2; + l&=~1;//clear lsbit - txhead(app,verb,len); - for(i=0;i