X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fjtag%2Fjtag430asm.S;h=7e4aabf8895c00a563c62079bcdcdc8a4cff8721;hp=672d0ee23d5395536fba6b9c99b6bc9cbbc67d10;hb=d7ad826230d336ad7b7bd20e47dccc26d7ad456f;hpb=750c7626dbfebf6e043cfcbe02fcb4dd5df3aa34

diff --git a/firmware/apps/jtag/jtag430asm.S b/firmware/apps/jtag/jtag430asm.S
index 672d0ee..7e4aabf 100644
--- a/firmware/apps/jtag/jtag430asm.S
+++ b/firmware/apps/jtag/jtag430asm.S
@@ -1,6 +1,9 @@
 .globl jtag430_tclk_flashpulses
 .type jtag430_tclk_flashpulses,@function //for linking
 
+#define _GNU_ASSEMBLER_
+#include "gfports.h"
+
 //This detects model, chooses appropriate timing.
 jtag430_tclk_flashpulses:
 	mov &0x0ff0, r14
@@ -11,18 +14,22 @@ jtag430_tclk_flashpulses:
 // At 3.68MHz, 7 to 14 cycles/loop are allowed for 257 to 475kHz.
 // At 16MHz, 33 to 62 cycles/loop are allowed.
 jtag430_tclk_flashpulses_3mhz:
-	mov #0x0031, r14
-pulseloop3:	
+	mov #P5OUT, r14
+pulseloop3:
 	bis.b #2, @r14		;SETTCLK, 3 cycles
 	sub #1, r15		; 1 cycle
 	;;  1+3+3+1+2=10, within limits
+	nop
+	nop
+	nop			;10+3=13
+	
 	bic.b #2, @r14		;CLRTCLK, 3 cycles
 	tst r15			; 1 cycle
 	jnz pulseloop3		; 2 cycles
 	ret
 
 jtag430_tclk_flashpulses_16mhz:
-	mov #0x0031, r14
+	mov #P5OUT, r14
 pulseloop16:	
 	bis.b #2, @r14		;SETTCLK, 3 cycles
 	sub #1, r15		; 1 cycle