X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fjtag%2Fjtag430asm.S;h=e74ceb6482634cbfecfc25283f05794ec66e5505;hp=5bbf3520997b804f6e1e9696929a95ac81b96129;hb=19c84b41b9fbde102aee56bc137a8a2885194ebf;hpb=42c0903e02d7f9e6c26e7b53faa0961e9c2f0aeb

diff --git a/firmware/apps/jtag/jtag430asm.S b/firmware/apps/jtag/jtag430asm.S
index 5bbf352..e74ceb6 100644
--- a/firmware/apps/jtag/jtag430asm.S
+++ b/firmware/apps/jtag/jtag430asm.S
@@ -1,6 +1,13 @@
 .globl jtag430_tclk_flashpulses
 .type jtag430_tclk_flashpulses,@function //for linking
 
+#define _GNU_ASSEMBLER_
+#include "config.h"
+
+//We need to include port definitions,
+//but msp430.h is no long asm clean.
+#include <msp430f1612.h>
+
 //This detects model, chooses appropriate timing.
 jtag430_tclk_flashpulses:
 	mov &0x0ff0, r14
@@ -11,7 +18,7 @@ jtag430_tclk_flashpulses:
 // At 3.68MHz, 7 to 14 cycles/loop are allowed for 257 to 475kHz.
 // At 16MHz, 33 to 62 cycles/loop are allowed.
 jtag430_tclk_flashpulses_3mhz:
-	mov #0x0031, r14
+	mov #P5OUT, r14
 pulseloop3:
 	bis.b #2, @r14		;SETTCLK, 3 cycles
 	sub #1, r15		; 1 cycle
@@ -26,7 +33,7 @@ pulseloop3:
 	ret
 
 jtag430_tclk_flashpulses_16mhz:
-	mov #0x0031, r14
+	mov #P5OUT, r14
 pulseloop16:	
 	bis.b #2, @r14		;SETTCLK, 3 cycles
 	sub #1, r15		; 1 cycle