X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fjtag%2Fjtag430asm.S;h=e9fa6f5b70d03962bfa4439298c85dc5c3e7b357;hp=24770164823cdc5b17d395063bccb8a8faaba59b;hb=74ab06d026d20e3c13cd2bcb1ac89d83d79fbf5f;hpb=7487b2cd89324081ccfc195d49f4158f10ec534f

diff --git a/firmware/apps/jtag/jtag430asm.S b/firmware/apps/jtag/jtag430asm.S
index 2477016..e9fa6f5 100644
--- a/firmware/apps/jtag/jtag430asm.S
+++ b/firmware/apps/jtag/jtag430asm.S
@@ -1,14 +1,16 @@
 .globl jtag430_tclk_flashpulses
-.type jtag430_tclk_flashpulses,@function    /* declare main as a function */
-	
+.type jtag430_tclk_flashpulses,@function //for linking
+
+
+//! At 3.68MHz, 7 to 14 cycles/loop are allowed for 257 to 475kHz
 jtag430_tclk_flashpulses:
-	sub #1, r15
-	bis.b #2, &0x0031	;SETTCLK
-	nop
-	nop
-	nop
-	bic.b #2, &0x0031	;CLRTCLK
-	tst r15
-	jnz jtag430_tclk_flashpulses
+	mov #0x0031, r14
+pulseloop:	
+	bis.b #2, @r14		;SETTCLK, 3 cycles
+	sub #1, r15		; 1 cycle
+	;;  1+3+3+1+2=10, within limits
+	bic.b #2, @r14		;CLRTCLK, 3 cycles
+	tst r15			; 1 cycle
+	jnz pulseloop		; 2 cycles
 	ret