X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fjtag%2Fjtag430x2.c;h=1f242ed3dc5bdf13a8e02e765d14813afd4ed9ea;hp=b508f0beabfe78b58f4e790895ef5d86c8a36b25;hb=e1bb976d013627c7fd97c6e5ca547c548483a19f;hpb=ef8b3dcd43ed26a82df672e64396bf8c024bb09c;ds=sidebyside diff --git a/firmware/apps/jtag/jtag430x2.c b/firmware/apps/jtag/jtag430x2.c index b508f0b..1f242ed 100644 --- a/firmware/apps/jtag/jtag430x2.c +++ b/firmware/apps/jtag/jtag430x2.c @@ -1,15 +1,11 @@ /*! \file jtag430x2.c \author Travis Goodspeed - - This is an implementation of the MSP430X2 JTAG protocol - for the GoodFET project at http://goodfet.sf.net/ - - See the license file for details of proper use. + \brief MSP430X2 JTAG (20-bit) */ #include "platform.h" #include "command.h" -#include "jtag.h" +#include "jtag430.h" unsigned char jtagid; @@ -31,12 +27,12 @@ unsigned char jtag430x2_start(){ //Entry sequence from Page 67 of SLAU265A for 4-wire MSP430 JTAG CLRRST; - delay(10); + delay(20);//10 CLRTST; - delay(5); + delay(10);//5 SETTST; - msdelay(5); + msdelay(10);//5 SETRST; P5DIR&=~RST; @@ -87,29 +83,30 @@ void jtag430x2_writemem(unsigned long adr, SETTCLK; //init state }else{ - while(1) P1OUT^=1; //loop if locked up + while(1) PLEDOUT^=PLEDPIN; //loop if locked up } } //! Read data from address unsigned int jtag430x2_readmem(unsigned long adr){ unsigned int toret=0; - unsigned int tries=5; + //unsigned int tries=5; while(1){ - do{ - jtag_ir_shift8(IR_CNTRL_SIG_CAPTURE); - }while(!(jtag_dr_shift16(0) & 0x0301)); + //do{ + jtag_ir_shift8(IR_CNTRL_SIG_CAPTURE); + //}while(!(jtag_dr_shift16(0) & 0x0301)); if(jtag_dr_shift16(0) & 0x0301){ // Read Memory CLRTCLK; jtag_ir_shift8(IR_CNTRL_SIG_16BIT); - if(adr>=0x100){ - jtag_dr_shift16(0x0501);//word read - }else{ - jtag_dr_shift16(0x0511);//byte read - } + + //if(adr>=0x100){ + jtag_dr_shift16(0x0501);//word read + //}else{ + //jtag_dr_shift16(0x0511);//byte read + //} jtag_ir_shift8(IR_ADDR_16BIT); jtag_dr_shift20(adr); //20 @@ -190,7 +187,7 @@ unsigned int jtag430x2_fusecheck(){ //! Handles MSP430X2 JTAG commands. Forwards others to JTAG. void jtag430x2handle(unsigned char app, unsigned char verb, - unsigned char len){ + unsigned long len){ register char blocks; unsigned int i,val; @@ -198,20 +195,45 @@ void jtag430x2handle(unsigned char app, //jtag430_resettap(); + if(verb!=START && jtag430mode==MSP430MODE){ + jtag430handle(app,verb,len); + return; + } + switch(verb){ case START: //Enter JTAG mode. - do cmddata[0]=jtag430x2_start(); - while(cmddata[0]==00 || cmddata[0]==0xFF); + //do + cmddata[0]=jtag430x2_start(); + //while(cmddata[0]==00 || cmddata[0]==0xFF); //MSP430 or MSP430X if(jtagid==MSP430JTAGID){ jtag430mode=MSP430MODE; - drwidth=16; + + /* So the way this works is that a width of 20 does some + backward-compatibility finagling, causing the correct value + to be exchanged for addresses on 16-bit chips as well as the + new MSP430X chips. (This has only been verified on the + MSP430F2xx family. TODO verify for others.) + */ + + drwidth=20; + + //Perform a reset and disable watchdog. + jtag430_por(); + jtag430_writemem(0x120,0x5a80);//disable watchdog + + jtag430_haltcpu(); + + jtag430_resettap(); + txdata(app,verb,1); + return; }else if(jtagid==MSP430X2JTAGID){ jtag430mode=MSP430X2MODE; drwidth=20; }else{ + debugstr("JTAG version unknown."); txdata(app,NOK,1); return; } @@ -229,16 +251,8 @@ void jtag430x2handle(unsigned char app, blocks=(len>4?cmddata[4]:1); at=cmddatalong[0]; - /* - cmddataword[0]=jtag430x2_readmem(at); - txdata(app,verb,2); - break; - */ - len=0x80; - serial_tx(app); - serial_tx(verb); - serial_tx(len); + txhead(app,verb,len); while(blocks--){ for(i=0;i