X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fjtag%2Fjtag430x2.c;h=67ef45b35f11f8fa7abddeb720410febc36cf41f;hp=d671da4635d9202442ca1724baa9b42d037dbb0e;hb=4a40f1ea2b25e6f9fc306cb197fa3e84f40adc9f;hpb=f62599f649eb7fbd7f14d7469953ebbfd182f706 diff --git a/firmware/apps/jtag/jtag430x2.c b/firmware/apps/jtag/jtag430x2.c index d671da4..67ef45b 100644 --- a/firmware/apps/jtag/jtag430x2.c +++ b/firmware/apps/jtag/jtag430x2.c @@ -29,42 +29,58 @@ app_t const jtag430x2_app = { "\tfor 20-bit MSP430X2 devices, such as the MSP430F5xx Family.\n" }; +//! Shift 20 bits of the DR. +uint32_t jtag430_dr_shift_20(uint32_t in) +{ + if (!in_run_test_idle()) + { + debugstr("Not in run-test-idle state"); + return 0; + } + + // get intot the right state + jtag_capture_dr(); + jtag_shift_register(); + + // shift DR, then idle + return jtag_trans_n(in, 20, MSB); +} //! Grab the core ID. unsigned int jtag430_coreid(){ - jtag_ir_shift8(IR_COREIP_ID); - return jtag_dr_shift16(0); + jtag_ir_shift_8(IR_COREIP_ID); + return jtag_dr_shift_16(0); } //! Grab the device ID. unsigned long jtag430_deviceid(){ - jtag_ir_shift8(IR_DEVICE_ID); - return jtag_dr_shift20(0); + jtag_ir_shift_8(IR_DEVICE_ID); + return jtag430_dr_shift_20(0); } //! Write data to address void jtag430x2_writemem(unsigned long adr, unsigned int data){ - jtag_ir_shift8(IR_CNTRL_SIG_CAPTURE); - if(jtag_dr_shift16(0) & 0x0301){ + jtag_ir_shift_8(IR_CNTRL_SIG_CAPTURE); + if(jtag_dr_shift_16(0) & 0x0301){ CLRTCLK; - jtag_ir_shift8(IR_CNTRL_SIG_16BIT); + jtag_ir_shift_8(IR_CNTRL_SIG_16BIT); if(adr>=0x100) - jtag_dr_shift16(0x0500);//word mode + jtag_dr_shift_16(0x0500);//word mode else - jtag_dr_shift16(0x0510);//byte mode - jtag_ir_shift8(IR_ADDR_16BIT); - jtag_dr_shift20(adr); + jtag_dr_shift_16(0x0510);//byte mode + jtag_ir_shift_8(IR_ADDR_16BIT); + jtag430_dr_shift_20(adr); SETTCLK; - jtag_ir_shift8(IR_DATA_TO_ADDR); - jtag_dr_shift16(data);//16 word + jtag_ir_shift_8(IR_DATA_TO_ADDR); + jtag_dr_shift_16(data);//16 word CLRTCLK; - jtag_ir_shift8(IR_CNTRL_SIG_16BIT); - jtag_dr_shift16(0x0501); + jtag_ir_shift_8(IR_CNTRL_SIG_16BIT); + jtag_dr_shift_16(0x0501); SETTCLK; CLRTCLK; @@ -81,28 +97,24 @@ unsigned int jtag430x2_readmem(unsigned long adr){ //unsigned int tries=5; while(1){ - //do{ - jtag_ir_shift8(IR_CNTRL_SIG_CAPTURE); - //}while(!(jtag_dr_shift16(0) & 0x0301)); + do{ + jtag_ir_shift_8(IR_CNTRL_SIG_CAPTURE); + }while(!(jtag_dr_shift_16(0) & 0x0301)); - if(jtag_dr_shift16(0) & 0x0301){ + if(jtag_dr_shift_16(0) & 0x0301){ // Read Memory CLRTCLK; - jtag_ir_shift8(IR_CNTRL_SIG_16BIT); + jtag_ir_shift_8(IR_CNTRL_SIG_16BIT); - //if(adr>=0x100){ - jtag_dr_shift16(0x0501);//word read - //}else{ - //jtag_dr_shift16(0x0511);//byte read - //} + jtag_dr_shift_16(0x0501);//word read - jtag_ir_shift8(IR_ADDR_16BIT); - jtag_dr_shift20(adr); //20 + jtag_ir_shift_8(IR_ADDR_16BIT); + jtag430_dr_shift_20(adr); //20 - jtag_ir_shift8(IR_DATA_TO_ADDR); + jtag_ir_shift_8(IR_DATA_TO_ADDR); SETTCLK; CLRTCLK; - toret = jtag_dr_shift16(0x0000); + toret = jtag_dr_shift_16(0x0000); SETTCLK; @@ -111,15 +123,17 @@ unsigned int jtag430x2_readmem(unsigned long adr){ SETTCLK; return toret; } + + return 0xdead; } //return toret; } //! Syncs a POR. unsigned int jtag430x2_syncpor(){ - jtag_ir_shift8(IR_CNTRL_SIG_16BIT); - jtag_dr_shift16(0x1501); //JTAG mode - while(!(jtag_dr_shift16(0) & 0x200)); + jtag_ir_shift_8(IR_CNTRL_SIG_16BIT); + jtag_dr_shift_16(0x1501); //JTAG mode + while(!(jtag_dr_shift_16(0) & 0x200)); //0x100 or 0x200? return jtag430x2_por(); } @@ -131,9 +145,9 @@ unsigned int jtag430x2_por(){ CLRTCLK; SETTCLK; - jtag_ir_shift8(IR_CNTRL_SIG_16BIT); - jtag_dr_shift16(0x0C01); - jtag_dr_shift16(0x0401); + jtag_ir_shift_8(IR_CNTRL_SIG_16BIT); + jtag_dr_shift_16(0x0C01); + jtag_dr_shift_16(0x0401); //cycle for (i = 0; i < 10; i++){ @@ -141,7 +155,7 @@ unsigned int jtag430x2_por(){ SETTCLK; } - jtag_dr_shift16(0x0501); + jtag_dr_shift_16(0x0501); // tick CLRTCLK; @@ -152,8 +166,8 @@ unsigned int jtag430x2_por(){ jtag430x2_writemem(0x015C, 0x5A80); // check state - jtag_ir_shift8(IR_CNTRL_SIG_CAPTURE); - if(jtag_dr_shift16(0) & 0x0301) + jtag_ir_shift_8(IR_CNTRL_SIG_CAPTURE); + if(jtag_dr_shift_16(0) & 0x0301) return(1);//ok return 0;//error @@ -164,8 +178,8 @@ unsigned int jtag430x2_por(){ unsigned int jtag430x2_fusecheck(){ int i; for(i=0;i<3;i++){ - jtag_ir_shift8(IR_CNTRL_SIG_CAPTURE); - if(jtag_dr_shift16(0xAAAA)==0x5555) + jtag_ir_shift_8(IR_CNTRL_SIG_CAPTURE); + if(jtag_dr_shift_16(0xAAAA)==0x5555) return 1;//blown } return 0;//unblown @@ -177,8 +191,6 @@ void jtag430x2_handle_fn( uint8_t const app, uint8_t const verb, uint32_t const len) { - register char blocks; - unsigned int i,val; unsigned long at, l; @@ -198,7 +210,26 @@ void jtag430x2_handle_fn( uint8_t const app, //MSP430 or MSP430X if(jtagid==MSP430JTAGID){ - debugstr("ERROR, using JTAG430X2 instead of JTAG430!"); + //debugstr("ERROR, using JTAG430X2 instead of JTAG430!"); + jtag430mode=MSP430MODE; + + /* So the way this works is that a width of 20 does some + backward-compatibility finagling, causing the correct value + to be exchanged for addresses on 16-bit chips as well as the + new MSP430X chips. (This has only been verified on the + MSP430F2xx family. TODO verify for others.) + */ + + drwidth=20; + + //Perform a reset and disable watchdog. + jtag430_por(); + jtag430_writemem(0x120,0x5a80);//disable watchdog + + jtag430_haltcpu(); + + jtag430_resettap(); + txdata(app,verb,1); return; }else if(jtagid==MSP430X2JTAGID){ jtag430mode=MSP430X2MODE;