X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fjtag%2Fjtag430x2.c;h=e49634679000aa620a88d734d0ec5b5a2cd74e51;hp=5cafafeaddedba6384e32c2299188a1cc3937033;hb=4b2f28239ea1c0f76117e813fc8838f8a368d2bf;hpb=dd37f96a4f842ea15233b8d0efd4ec001ad5de9c

diff --git a/firmware/apps/jtag/jtag430x2.c b/firmware/apps/jtag/jtag430x2.c
index 5cafafe..e496346 100644
--- a/firmware/apps/jtag/jtag430x2.c
+++ b/firmware/apps/jtag/jtag430x2.c
@@ -56,61 +56,38 @@ unsigned long jtag430_deviceid(){
   return jtag_dr_shift20(0);
 }
 
-//! Set the program counter.
-void jtag430x2_setpc(unsigned long pc){
-  //From SLAU265.
-  
-  unsigned short Mova;
-  unsigned short Pc_l;
 
-  Mova  = 0x0080;
-  Mova += (unsigned short)((pc>>8) & 0x00000F00);
-  Pc_l  = (unsigned short)((pc & 0xFFFF));
+//! Read data from address
+unsigned int jtag430x2_readmem(unsigned long adr){
+  unsigned int toret=0;
 
-  // Check Full-Emulation-State at the beginning                                                                                                                                   
   jtag_ir_shift8(IR_CNTRL_SIG_CAPTURE);
   if(jtag_dr_shift16(0) & 0x0301){
-      // MOVA #imm20, PC                                                                                                                                                             
-      CLRTCLK;
-      // take over bus control during clock LOW phase                                                                                                                                
-      jtag_ir_shift8(IR_DATA_16BIT);
-      SETTCLK;
-      jtag_dr_shift16(Mova);
-      jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
-      jtag_dr_shift16(0x1400);
-      jtag_ir_shift8(IR_DATA_16BIT);
-      CLRTCLK;
-      SETTCLK;
-      jtag_dr_shift16(Pc_l);
-      CLRTCLK;
-      SETTCLK;
-      jtag_dr_shift16(0x4303);
-      CLRTCLK;
-      jtag_ir_shift8(IR_ADDR_CAPTURE);
-      jtag_dr_shift20(0x00000);
-  }else{
-    while(1) P1OUT^=1; //Lock LED if locked up.
-  }
-}
-
+    // Read Memory                                                                                                                                                                 
+    CLRTCLK;
+    jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
+    if(adr>=0x100){
+      jtag_dr_shift16(0x0501);//word read
+    }else{
+      jtag_dr_shift16(0x0511);//byte read
+    }
+    jtag_ir_shift8(IR_ADDR_16BIT);
+    jtag_dr_shift20(adr);
 
-//! Read data from address
-unsigned int jtag430x2_readmem(unsigned int adr){
-  unsigned int toret;
-  
-  jtag430x2_setpc(adr);
-  SETTCLK;
-  jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
-  jtag_dr_shift16(0x0501);
-  jtag_ir_shift8(IR_ADDR_CAPTURE);
+    jtag_ir_shift8(IR_DATA_TO_ADDR);
+    SETTCLK;
+    CLRTCLK;
+    toret = jtag_dr_shift16(0x0000);
+    
+    SETTCLK;
+    // one or more cycle, so CPU is driving correct MAB
 
-  jtag_ir_shift8(IR_DATA_QUICK);
+    CLRTCLK;
+    SETTCLK;
+    // Processor is now again in Init State
+  }
 
-  SETTCLK;
-  CLRTCLK;
-  toret = jtag_dr_shift16(0);//read
 
-  jtag_ir_shift8(IR_CNTRL_SIG_CAPTURE);
   
   return toret;
 }