X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fradios%2Fccspi.c;h=83dfa37b4ca42d6e4a5b1ae16e7adc78a5228e8c;hp=74dde4fbfb8225a0b501a322dde8e889a9df2402;hb=ed8fe6653a821e893857c9491d576b8c6dee8dad;hpb=854dba571fe62948dfb23a396be3299225fcbb05

diff --git a/firmware/apps/radios/ccspi.c b/firmware/apps/radios/ccspi.c
index 74dde4f..83dfa37 100644
--- a/firmware/apps/radios/ccspi.c
+++ b/firmware/apps/radios/ccspi.c
@@ -46,10 +46,6 @@ app_t const ccspi_app = {
 	"\tmust be moved into the client.\n"
 };
 
-
-#define RADIOACTIVE CLRCE
-#define RADIOPASSIVE SETCE
-
 //! Set up the pins for CCSPI mode.
 void ccspisetup(){
   SPIDIR&=~MISO;
@@ -57,13 +53,15 @@ void ccspisetup(){
   DIRSS;
   DIRCE;
   
-  //Telos B Radio VReg Enable
-  P4DIR|=BIT5+BIT2+BIT6+BIT7;
-  P4OUT|=BIT5+BIT7;
-  P4OUT&=~(BIT6+BIT2);
+  P4OUT|=BIT5; //activate CC2420 voltage regulator
+  msdelay(100);
+  
+  //Reset the CC2420.
+  P4OUT&=~BIT6;
+  P4OUT|=BIT6;
   
   //Begin a new transaction.
-  CLRSS; 
+  CLRSS;
   SETSS;
 }
 
@@ -124,45 +122,61 @@ void ccspi_handle_fn( uint8_t const app,
   //debugstr("Chipcon SPI handler.");
   
   switch(verb){
+  case PEEK:
+    cmddata[0]|=0x40; //Set the read bit.
+    //DO NOT BREAK HERE.
   case READ:
   case WRITE:
+  case POKE:
     CLRSS; //Drop !SS to begin transaction.
     for(i=0;i<len;i++)
       cmddata[i]=ccspitrans8(cmddata[i]);
     SETSS;  //Raise !SS to end transaction.
     txdata(app,verb,len);
     break;
-
-  case PEEK://Grab CCSPI Register
-    CLRSS; //Drop !SS to begin transaction.
-    cmddata[0]=ccspitrans8(/*CCSPI_R_REGISTER |*/ cmddata[0]); //000A AAAA
-    for(i=1;i<len;i++)
-      cmddata[i]=ccspitrans8(cmddata[i]);
-    SETSS;  //Raise !SS to end transaction.
-    txdata(app,verb,len);
-    break;
-    
-  case POKE://Poke CCSPI Register
-    CLRSS; //Drop !SS to begin transaction.
-    cmddata[0]=ccspitrans8(/* CCSPI_W_REGISTER |*/ 0x40 | cmddata[0]); //02AA AAAA
-    for(i=1;i<len;i++)
-      cmddata[i]=ccspitrans8(cmddata[i]);
-    SETSS;  //Raise !SS to end transaction.
-    txdata(app,verb,len);
-    break;
   case SETUP:
     ccspisetup();
     txdata(app,verb,0);
     break;
   case CCSPI_RX:
-    //Get the packet.
-    CLRSS;
-    ccspitrans8(CCSPI_RXFIFO);
-    for(i=0;i<32;i++)
-      cmddata[i]=ccspitrans8(0xde);
-    SETSS;
-    //no break
-    txdata(app,verb,32);
+#ifdef FIFOP
+    //Has there been an overflow?
+    if((!FIFO)&&FIFOP){
+      debugstr("Clearing overflow");
+      CLRSS;
+      ccspitrans8(0x08); //SFLUSHRX
+      SETSS;
+    }
+    
+    //Is there a packet?
+    if(FIFOP&&FIFO){
+      //Wait for completion.
+      while(SFD);
+      
+      //Get the packet.
+      CLRSS;
+      ccspitrans8(CCSPI_RXFIFO | 0x40);
+      //ccspitrans8(0x3F|0x40);
+      cmddata[0]=0xff; //to be replaced with length
+      for(i=0;i<cmddata[0]+2;i++)
+        cmddata[i]=ccspitrans8(0xde);
+      SETSS;
+      
+      //Flush buffer.
+      CLRSS;
+      ccspitrans8(0x08); //SFLUSHRX
+      SETSS;
+      //Only should transmit length of one more than the reported
+      // length of the frame, which holds the length byte:
+      txdata(app,verb,cmddata[0]+1);
+    }else{
+      //No packet.
+      txdata(app,verb,0);
+    }
+#else
+    debugstr("Can't RX a packet with SFD and FIFOP definitions.");
+    txdata(app,NOK,0);
+#endif
     break;
   case CCSPI_RX_FLUSH:
     //Flush the buffer.
@@ -170,13 +184,100 @@ void ccspi_handle_fn( uint8_t const app,
     ccspitrans8(CCSPI_SFLUSHRX);
     SETSS;
     
-    //Return the packet.
-    txdata(app,verb,32);
+    txdata(app,verb,0);
     break;
-  case CCSPI_TX:
+
+  case CCSPI_REFLEX:
+    debugstr("Beta implementation.");
+    cmddata[0] = 1;
+    txdata(app,verb,cmddata[0]+1);
+
+    while(1) {
+        //Wait until a packet is received
+        while(!SFD);
+        //Turn on LED 2 (green) as signal
+	    PLED2DIR |= PLED2PIN;
+	    PLED2OUT &= ~PLED2PIN;
+
+        //Switch the radio to TX mode
+        CLRSS;  //Drop !SS to begin transaction.
+        ccspitrans8(0x04);
+        SETSS;  //Raise !SS to end transaction.
+        //txdata(app,verb,len);
+
+        //Load the packet.
+        CLRSS;
+        ccspitrans8(CCSPI_TXFIFO);
+        char pkt[15] = {0x0f, 0x01, 0x08, 0x82, 0xff, 0xff, 0xff, 0xff, 0xde, 0xad, 0xbe, 0xef, 0xba, 0xbe, 0xc0};
+        for(i=0;i<pkt[0];i++)
+          ccspitrans8(pkt[i]);
+        SETSS;
+        debugstr("Packet loaded for tx.");
+        //Transmit the packet.
+        CLRSS;
+        ccspitrans8(0x04); //STXON
+        SETSS;
+        //Wait for the pulse on SFD, after which the packet has been sent.
+        //while(!SFD);
+        //while(SFD);
+        msdelay(300);
+        //Flush TX buffer.
+        CLRSS;
+        ccspitrans8(0x09); //SFLUSHTX
+        SETSS;
+
+        //while(SFD);
+        //msdelay(200);
+        //Turn off LED 2 (green) as signal
+	    PLED2DIR |= PLED2PIN;
+	    PLED2OUT |= PLED2PIN;
+    }
+    //TODO the firmware stops staying in this mode after a while, and stops jamming... need to find a fix!
+    break;
+
   case CCSPI_TX_FLUSH:
+    //Flush the buffer.
+    CLRSS;
+    ccspitrans8(CCSPI_SFLUSHTX);
+    SETSS;
+    
+    txdata(app,verb,0);
+    break;
+  case CCSPI_TX:
+#ifdef FIFOP
+    
+    //Wait for last packet to TX.
+    //while(ccspi_status()&BIT3);
+    
+    //Load the packet.
+    CLRSS;
+    ccspitrans8(CCSPI_TXFIFO);
+    for(i=0;i<cmddata[0];i++)
+      ccspitrans8(cmddata[i]);
+    SETSS;
+    
+    //Transmit the packet.
+    CLRSS;
+    ccspitrans8(0x04); //STXON
+    SETSS;
+    
+    //Wait for the pulse on SFD, after which the packet has been sent.
+    while(!SFD);
+    while(SFD);
+    
+    //Flush TX buffer.
+    CLRSS;
+    ccspitrans8(0x09); //SFLUSHTX
+    SETSS;
+    
+    txdata(app,verb,0);
+#else
+    debugstr("Can't TX a packet with SFD and FIFOP definitions.");
+    txdata(app,NOK,0);
+#endif
+    break;
   default:
-    debugstr("Not yet supported.");
+    debugstr("Not yet supported in CCSPI");
     txdata(app,verb,0);
     break;
   }