X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fradios%2Fccspi.c;h=8a8d7e8d3be2d83fe824809b7d8952b3bc3ca8be;hp=277a44070b4327d96f7a82a441d4046e3eb21691;hb=5faf3dc1d40b8afe5fe438f6808a4d6f1d169580;hpb=0b92a77db417a3f3b0482a5c5444c50042674fda diff --git a/firmware/apps/radios/ccspi.c b/firmware/apps/radios/ccspi.c index 277a440..8a8d7e8 100644 --- a/firmware/apps/radios/ccspi.c +++ b/firmware/apps/radios/ccspi.c @@ -1,7 +1,7 @@ /*! \file ccspi.c \author Travis Goodspeed \brief Chipcon SPI Register Interface - + Unfortunately, there is very little similarity between the CC2420 and the CC2500, to name just two of the myriad of Chipcon SPI radios. Auto-detection will be a bit difficult, but more to the @@ -12,10 +12,7 @@ #include "platform.h" #include "command.h" - -#include -#include -#include +#include //added for itoa #include "ccspi.h" #include "spi.h" @@ -52,14 +49,14 @@ void ccspisetup(){ SPIDIR|=MOSI+SCK; DIRSS; DIRCE; - + P4OUT|=BIT5; //activate CC2420 voltage regulator msdelay(100); - + //Reset the CC2420. P4OUT&=~BIT6; P4OUT|=BIT6; - + //Begin a new transaction. CLRSS; SETSS; @@ -70,7 +67,7 @@ u8 ccspitrans8(u8 byte){ register unsigned int bit; //This function came from the CCSPI Wikipedia article. //Minor alterations. - + for (bit = 0; bit < 8; bit++) { /* write MOSI on trailing edge of previous clock */ if (byte & 0x80) @@ -78,14 +75,14 @@ u8 ccspitrans8(u8 byte){ else CLRMOSI; byte <<= 1; - + SETCLK; - + /* read MISO on trailing edge */ byte |= READMISO; CLRCLK; } - + return byte; } @@ -93,22 +90,22 @@ u8 ccspitrans8(u8 byte){ //! Writes a register u8 ccspi_regwrite(u8 reg, const u8 *buf, int len){ CLRSS; - + reg=ccspitrans8(reg); while(len--) ccspitrans8(*buf++); - + SETSS; return reg;//status } //! Reads a register u8 ccspi_regread(u8 reg, u8 *buf, int len){ CLRSS; - + reg=ccspitrans8(reg); while(len--) *buf++=ccspitrans8(0); - + SETSS; return reg;//status } @@ -118,9 +115,9 @@ void ccspi_handle_fn( uint8_t const app, uint8_t const verb, uint32_t const len){ unsigned long i; - + //debugstr("Chipcon SPI handler."); - + switch(verb){ case PEEK: cmddata[0]|=0x40; //Set the read bit. @@ -140,14 +137,14 @@ void ccspi_handle_fn( uint8_t const app, break; case CCSPI_RX: #ifdef FIFOP - //Has there been an overflow? + //Has there been an overflow? if((!FIFO)&&FIFOP){ - debugstr("Clearing overflow"); + //debugstr("Clearing overflow"); CLRSS; ccspitrans8(0x08); //SFLUSHRX SETSS; } - + //Is there a packet? if(FIFOP&&FIFO){ //Wait for completion. @@ -159,13 +156,15 @@ void ccspi_handle_fn( uint8_t const app, //ccspitrans8(0x3F|0x40); cmddata[0]=0xff; //to be replaced with length for(i=0;i> 8) & 0xFF; + + for(i=0;i