X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fradios%2Fccspi.c;h=a124b536cea22c4358dc1f2bd1fd63d88548da25;hp=62d0130bec968376e6a13cd9921c91404fb930dc;hb=4b4d432fa54e8130f216f97d1a976795f3c446a4;hpb=9134ed351ad68ee6c10875f02571b4c46d2072fa diff --git a/firmware/apps/radios/ccspi.c b/firmware/apps/radios/ccspi.c index 62d0130..a124b53 100644 --- a/firmware/apps/radios/ccspi.c +++ b/firmware/apps/radios/ccspi.c @@ -50,12 +50,14 @@ void ccspisetup(){ DIRSS; DIRCE; - P4OUT|=BIT5; //activate CC2420 voltage regulator + //P4OUT|=BIT5; //activate CC2420 voltage regulator msdelay(100); //Reset the CC2420. - P4OUT&=~BIT6; - P4OUT|=BIT6; + /*P4OUT&=~BIT6; FIXME Does the new code work on Z1 and Telosb? + P4OUT|=BIT6;*/ + CLRCE; + SETCE; //Begin a new transaction. CLRSS; @@ -101,7 +103,7 @@ void ccspireflexjam(u16 delay){ while(!SFD){ //Has there been an overflow in the RX buffer? if((!FIFO)&&FIFOP){ - debugstr("Clearing RX overflow"); + //debugstr("Clearing RX overflow"); CLRSS; ccspitrans8(0x08); //SFLUSHRX SETSS; @@ -116,46 +118,79 @@ void ccspireflexjam(u16 delay){ //Wait a few us to send it. delay_us(delay); - //Put radio in TX mode + //Transmit the packet. CLRSS; ccspitrans8(0x04); SETSS; - //Load the jamming packet. + //Load the next jamming packet. //Note: attempts to preload this actually slowed the jam time down from 7 to 9 bytes. CLRSS; ccspitrans8(CCSPI_TXFIFO); - char pkt[15] = {0x0f, 0x01, 0x08, 0x82, 0xff, 0xff, 0xff, 0xff, 0xde, 0xad, 0xbe, 0xef, 0xba, 0xbe, 0xc0}; + char pkt[5] = {0x05, 0, 0, 0, 0}; + //char pkt[15] = {0x0f, 0x01, 0x08, 0x82, 0xff, 0xff, 0xff, 0xff, 0xde, 0xad, 0xbe, 0xef, 0xba, 0xbe, 0xc0}; //char pkt[12] = {0x0c, 0x01, 0x08, 0x82, 0xff, 0xff, 0xff, 0xff, 0xde, 0xad, 0xbe, 0xef}; for(i=0;i>1)&0xC0) // MSBits are high bits of 9-bit address. + // Read/!Write bit should be clear to write. + ); + + //Data goes here. + while(len--) + ccspitrans8(*data++); + + SETSS; +} +//! Read bytes from the CC2420's RAM. Untested. +void ccspi_peekram(u16 addr, u8 *data, u16 len){ + CLRSS; + + //Begin with the start address. + ccspitrans8(0x80 | (addr & 0x7F)); + ccspitrans8(((addr>>1)&0xC0) // MSBits are high bits of 9-bit address. + | BIT5 // Read/!Write bit should be set to read. + ); + + //Data goes here. + while(len--) + *data++=ccspitrans8(0); + + SETSS; +} + +//! Updates the Nonce's sequence number. +void ccspi_updaterxnonce(u32 seq){ + +} //! Writes a register u8 ccspi_regwrite(u8 reg, const u8 *buf, int len){ @@ -208,14 +243,31 @@ void ccspi_handle_fn( uint8_t const app, ccspisetup(); txdata(app,verb,0); break; + case CCSPI_PEEK_RAM: + i=cmddataword[1]; // Backup length. + ccspi_peekram(cmddataword[0], // First word is the address. + cmddata, // Return in the same buffer. + cmddataword[1] // Second word is the length. + ); + txdata(app,verb,i); + break; + case CCSPI_POKE_RAM: + ccspi_pokeram(cmddataword[0], //First word is address + cmddata+2, //Remainder of buffer is dat. + len-2 //Length implied by packet length. + ); + txdata(app,verb,0); + break; case CCSPI_RX: #ifdef FIFOP //Has there been an overflow? if((!FIFO)&&FIFOP){ - //debugstr("Clearing overflow"); + debugstr("Clearing overflow"); CLRSS; ccspitrans8(0x08); //SFLUSHRX SETSS; + txdata(app,verb,0); //no packet + return; } //Is there a packet? @@ -227,20 +279,100 @@ void ccspi_handle_fn( uint8_t const app, CLRSS; ccspitrans8(CCSPI_RXFIFO | 0x40); //ccspitrans8(0x3F|0x40); - cmddata[0]=0xff; //to be replaced with length - for(i=0;i