X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fradios%2Fccspi.c;h=dd70a3d15af92d7d6751d2d0fc8ba635b7d3ee2a;hp=eb7417ad09784b22521443895a9c56caec3e6a04;hb=HEAD;hpb=350c674c6bcd97ec2f883b07e0cf49eb8a480183

diff --git a/firmware/apps/radios/ccspi.c b/firmware/apps/radios/ccspi.c
index eb7417a..dd70a3d 100644
--- a/firmware/apps/radios/ccspi.c
+++ b/firmware/apps/radios/ccspi.c
@@ -19,8 +19,8 @@
 
 //! Handles a Chipcon SPI command.
 void ccspi_handle_fn( uint8_t const app,
-					  uint8_t const verb,
-					  uint32_t const len);
+		      uint8_t const verb,
+		      uint32_t const len);
 
 // define the ccspi app's app_t
 app_t const ccspi_app = {
@@ -50,12 +50,14 @@ void ccspisetup(){
   DIRSS;
   DIRCE;
 
-  P4OUT|=BIT5; //activate CC2420 voltage regulator
+  //P4OUT|=BIT5; //activate CC2420 voltage regulator
   msdelay(100);
 
   //Reset the CC2420.
-  P4OUT&=~BIT6;
-  P4OUT|=BIT6;
+  /*P4OUT&=~BIT6; FIXME Does the new code work on Z1 and Telosb?
+    P4OUT|=BIT6;*/ 
+  CLRCE;
+  SETCE;
 
   //Begin a new transaction.
   CLRSS;
@@ -87,6 +89,109 @@ u8 ccspitrans8(u8 byte){
 }
 
 
+//! Reflexively jam on the present channel.
+void ccspireflexjam(u16 delay){
+  unsigned long i;
+  #if defined(FIFOP) && defined(SFD) && defined(FIFO) && defined(PLED2DIR) && defined(PLED2PIN) && defined(PLED2OUT)
+  
+  prep_timer();
+  debugstr("Reflex jamming until reset.");
+  debughex(delay);
+  txdata(CCSPI,CCSPI_REFLEX,1);  //Let the client continue its business.
+  while(1) {
+    //Wait until a packet is received
+    while(!SFD){
+      //Has there been an overflow in the RX buffer?
+      if((!FIFO)&&FIFOP){
+	//debugstr("Clearing RX overflow");
+	CLRSS;
+	ccspitrans8(0x08); //SFLUSHRX
+	SETSS;
+      }
+    }
+    //Turn on LED 2 (green) as signal
+    PLED2DIR |= PLED2PIN;
+    PLED2OUT &= ~PLED2PIN;
+    
+    
+    
+    //Wait a few us to send it.
+    delay_us(delay);
+
+    //Transmit the packet.
+    CLRSS;
+    ccspitrans8(0x04);
+    SETSS;
+    
+    
+    //Load the next jamming packet.
+    //Note: attempts to preload this actually slowed the jam time down from 7 to 9 bytes.
+    CLRSS;
+    ccspitrans8(CCSPI_TXFIFO);
+    char pkt[5] = {0x05, 0, 0, 0, 0};
+    //char pkt[15] = {0x0f, 0x01, 0x08, 0x82, 0xff, 0xff, 0xff, 0xff, 0xde, 0xad, 0xbe, 0xef, 0xba, 0xbe, 0xc0};
+    //char pkt[12] = {0x0c, 0x01, 0x08, 0x82, 0xff, 0xff, 0xff, 0xff, 0xde, 0xad, 0xbe, 0xef};
+    for(i=0;i<pkt[0];i++)
+      ccspitrans8(pkt[i]);
+    SETSS;
+    
+    //* I think this might be unnecessary.
+    //msdelay(100+delay);      //Instead of waiting for pulse on SFD
+    //delay_ms(1);
+    //Flush TX buffer.
+    CLRSS;
+    ccspitrans8(0x09); //SFLUSHTX
+    SETSS;
+    
+    
+    //Turn off LED 2 (green) as signal
+    PLED2DIR |= PLED2PIN;
+    PLED2OUT |= PLED2PIN;
+  }
+#else
+  debugstr("Can't reflexively jam without SFD, FIFO, FIFOP, and P2LEDx definitions - try using telosb platform.");
+  txdata(CCSPI,NOK,0);
+#endif
+}
+
+//! Writes bytes into the CC2420's RAM.  Untested.
+void ccspi_pokeram(u8 addr, char *data, int len){
+  CLRSS;
+  //Begin with the start address.
+  ccspitrans8(0x80 | (addr & 0x7F)); 
+  ccspitrans8(((addr>>1)&0xC0) // MSBits are high bits of 9-bit address.
+	                       // Read/!Write bit should be clear to write.
+	      );
+  
+  //Data goes here.
+  while(len--)
+    ccspitrans8(*data++);
+  
+  SETSS;
+}
+
+//! Read bytes from the CC2420's RAM.  Untested.
+void ccspi_peekram(u16 addr, u8 *data, u16 len){
+  CLRSS;
+  
+  //Begin with the start address.
+  ccspitrans8(0x80 | (addr & 0x7F));
+  ccspitrans8(((addr>>1)&0xC0) // MSBits are high bits of 9-bit address.
+	      | BIT5           // Read/!Write bit should be set to read.
+	      ); 
+  
+  //Data goes here.
+  while(len--)
+    *data++=ccspitrans8(0);
+  
+  SETSS;
+}
+
+//! Updates the Nonce's sequence number.
+void ccspi_updaterxnonce(u32 seq){
+  
+}
+
 //! Writes a register
 u8 ccspi_regwrite(u8 reg, const u8 *buf, int len){
   CLRSS;
@@ -115,8 +220,7 @@ void ccspi_handle_fn( uint8_t const app,
 		      uint8_t const verb,
 		      uint32_t const len){
   unsigned long i;
-
-  //debugstr("Chipcon SPI handler.");
+  u8 j;
 
   switch(verb){
   case PEEK:
@@ -126,46 +230,171 @@ void ccspi_handle_fn( uint8_t const app,
   case WRITE:
   case POKE:
     CLRSS; //Drop !SS to begin transaction.
+    j=cmddata[0];//Backup address.
     for(i=0;i<len;i++)
       cmddata[i]=ccspitrans8(cmddata[i]);
     SETSS;  //Raise !SS to end transaction.
+    cmddata[0]=j&~0x40;//Restore address.
     txdata(app,verb,len);
     break;
   case SETUP:
     ccspisetup();
     txdata(app,verb,0);
     break;
+  case CCSPI_PEEK_RAM:
+    i=cmddataword[1]; // Backup length.
+    ccspi_peekram(cmddataword[0], // First word is the address.
+		   cmddata,        // Return in the same buffer.
+		   cmddataword[1]  // Second word is the length.
+		   );
+    txdata(app,verb,i);
+    break;
+  case CCSPI_POKE_RAM:
+    ccspi_pokeram(cmddataword[0], //First word is address
+		  cmddata+2,      //Remainder of buffer is dat.
+		  len-2           //Length implied by packet length.
+		  );
+    txdata(app,verb,0);
+    break;
+  case CCSPI_REPEAT_RX:
+
+    /* CCSPI_REPEAT_RX repeatedly requests new packets, forwarding
+       them to the server without waiting for the next request.  This
+       allows for sniffing of packets that would otherwise overflow
+       the buffer.
+    */
+
+    //debugstr("Looping CCSPI_RX.");
+    
+    //Loop forever in RX mode.
+    while(1){
+      ccspi_handle_fn(app,CCSPI_RX,0);
+    }
+    break;
   case CCSPI_RX:
 #ifdef FIFOP
     //Has there been an overflow?
+    
     if((!FIFO)&&FIFOP){
       debugstr("Clearing overflow");
       CLRSS;
       ccspitrans8(0x08); //SFLUSHRX
+      ccspitrans8(0x08); //SFLUSHRX
       SETSS;
+      txdata(app,verb,0); //no packet
+      return;
     }
-
+        
+    /* Uncomment this to wait around a bit for the packet.
+       Might reduce dropped packet count.
+    i=1000; //Number of tries.
+    while(!(FIFOP&&FIFO) && i--);
+    */
+    
     //Is there a packet?
-    if(FIFOP&&FIFO){
+    if (FIFOP && FIFO){
       //Wait for completion.
       while(SFD);
-
+      
       //Get the packet.
       CLRSS;
       ccspitrans8(CCSPI_RXFIFO | 0x40);
       //ccspitrans8(0x3F|0x40);
-      cmddata[0]=0xff; //to be replaced with length
-      for(i=0;i<cmddata[0]+2;i++)
-        cmddata[i]=ccspitrans8(0xde);
+      cmddata[0]=0x20; //to be replaced with length
+      
+      
+      /* This reads too far on some CC2420 revisions, but on others it
+	 works fine.  It probably has to do with whether FIFO drops
+	 before or after the SPI clocking.
+	 
+	 A software fix is to reset the CC2420 between packets.  This
+	 works, but a better solution is desired.
+      */
+      //for(i=0;i<cmddata[0]+1;i++)
+      for(i=0;FIFO && i<0x80;i++)
+        cmddata[i]=ccspitrans8(0x00);
       SETSS;
 
-      //Flush buffer.
+      /* We used to flush the RX buffer after receive. No longer.
       CLRSS;
       ccspitrans8(0x08); //SFLUSHRX
       SETSS;
-      //Only should transmit length of one more than the reported
-      // length of the frame, which holds the length byte:
-      txdata(app,verb,cmddata[0]+1);
+      */
+      
+      //Only transmit a packet if the length is legal.
+      if(cmddata[0]&0x80 || cmddata[0]==0) i=0;
+      txdata(app,verb,i);
+    }else{
+      
+      //No packet.
+      txdata(app,verb,0);
+    }
+#else
+    debugstr("Can't RX a packet with SFD and FIFOP definitions.");
+    txdata(app,NOK,0);
+#endif
+    break;
+  case CCSPI_RXDEC:
+#ifdef FIFOP
+    //Has there been an overflow?
+    if((!FIFO)&&FIFOP){
+      debugstr("Clearing overflow");
+      CLRSS;
+      ccspitrans8(0x08); //SFLUSHRX
+      SETSS;
+      txdata(app,verb,0); //no packet
+      return;
+    }
+
+    //Is there a packet?
+    if(FIFOP&&FIFO){
+      //Wait for completion.
+      while(SFD);
+      
+      CLRSS;
+      ccspitrans8(CCSPI_RXFIFO | 0x40);
+      // Grab the length.
+      cmddata[0]=ccspitrans8(0x00);
+      
+      //Read the header first.
+      for(i=1;i<cmddata[0]+1 && i<0x11;i++)
+        cmddata[i]=ccspitrans8(0x00);
+      SETSS;
+      
+      //Is the frame encrypted?
+      if(cmddata[1]&BIT3){
+	//Copy the sequence number to the Nonce.
+	
+	
+	//Decrypt the rest of the packet.
+	CLRSS; ccspitrans8(CCSPI_SRXDEC); SETSS;
+	
+	//Wait for decryption to complete.
+	while(!FIFO);
+      
+      }
+      
+      
+      //Get the packet, which is now decrypted in position.
+      CLRSS;
+      ccspitrans8(CCSPI_RXFIFO | 0x40);
+      //ccspitrans8(0x3F|0x40);
+      
+      
+      /* This reads too far on some CC2420 revisions, but on others it
+	 works fine.  It probably has to do with whether FIFO drops
+	 before or after the SPI clocking.
+	 
+	 A software fix is to reset the CC2420 between packets.  This
+	 works, but a better solution is desired.
+      */
+      for(;i<cmddata[0]+1;i++)
+        cmddata[i]=ccspitrans8(0x00);
+      SETSS;
+      
+      //Only forward a packet if the length is legal.
+      if(cmddata[0]&0x80) i=0;
+      txdata(app,verb,i);
     }else{
       //No packet.
       txdata(app,verb,0);
@@ -185,50 +414,8 @@ void ccspi_handle_fn( uint8_t const app,
     break;
 
   case CCSPI_REFLEX:
-#if defined(FIFOP) && defined(SFD) && defined(FIFO) && defined(PLED2DIR) && defined(PLED2PIN) && defined(PLED2OUT)
-    txdata(app,verb,1);  //Just sending some response back to client
-    while(1) {
-        //Wait until a packet is received
-        while(!SFD);
-        //Turn on LED 2 (green) as signal
-	    PLED2DIR |= PLED2PIN;
-	    PLED2OUT &= ~PLED2PIN;
-
-        //Put radio in TX mode
-        CLRSS;
-        ccspitrans8(0x04);
-        SETSS;
-
-        //Load the jamming packet.
-        //Note: attempts to preload this actually slowed the jam time down from 7 to 9 bytes.
-        CLRSS;
-        ccspitrans8(CCSPI_TXFIFO);
-        char pkt[15] = {0x0f, 0x01, 0x08, 0x82, 0xff, 0xff, 0xff, 0xff, 0xde, 0xad, 0xbe, 0xef, 0xba, 0xbe, 0xc0};
-        //char pkt[12] = {0x0c, 0x01, 0x08, 0x82, 0xff, 0xff, 0xff, 0xff, 0xde, 0xad, 0xbe, 0xef};
-        for(i=0;i<pkt[0];i++)
-          ccspitrans8(pkt[i]);
-        SETSS;
-
-        //Transmit the packet.
-        CLRSS;
-        ccspitrans8(0x04); //STXON
-        SETSS;
-        msdelay(100);      //Instead of waiting for pulse on SFD
-        //Flush TX buffer.
-        CLRSS;
-        ccspitrans8(0x09); //SFLUSHTX
-        SETSS;
-
-        //Turn off LED 2 (green) as signal
-	    PLED2DIR |= PLED2PIN;
-	    PLED2OUT |= PLED2PIN;
-    }
-    //TODO the firmware stops staying in this mode after a while, and stops jamming... need to find a fix.
+    ccspireflexjam(len?cmddataword[0]:0);
     break;
-#else
-    debugstr("Can't reflexively jam without SFD, FIFO, FIFOP, and P2LEDx definitions - try using telosb platform.");
-    txdata(app,NOK,0);
-#endif
 
   case CCSPI_REFLEX_AUTOACK:
 #if defined(FIFOP) && defined(SFD) && defined(FIFO) && defined(PLED2DIR) && defined(PLED2PIN) && defined(PLED2OUT)
@@ -332,8 +519,8 @@ void ccspi_handle_fn( uint8_t const app,
         //TODO disable AUTOCRC here again to go back to promiscous mode
 
         //Turn off LED 2 (green) as signal
-	    PLED2DIR |= PLED2PIN;
-	    PLED2OUT |= PLED2PIN;
+	PLED2DIR |= PLED2PIN;
+	PLED2OUT |= PLED2PIN;
     }
     //TODO the firmware stops staying in this mode after a while, and stops jamming... need to find a fix.
 #else
@@ -355,6 +542,12 @@ void ccspi_handle_fn( uint8_t const app,
 
     //Wait for last packet to TX.
     //while(ccspi_status()&BIT3);
+    
+    //Flush TX buffer.
+    CLRSS;
+    ccspitrans8(0x09); //SFLUSHTX
+    SETSS;
+    
 
     //Load the packet.
     CLRSS;
@@ -371,12 +564,7 @@ void ccspi_handle_fn( uint8_t const app,
     //Wait for the pulse on SFD, after which the packet has been sent.
     while(!SFD);
     while(SFD);
-
-    //Flush TX buffer.
-    CLRSS;
-    ccspitrans8(0x09); //SFLUSHTX
-    SETSS;
-
+    
     txdata(app,verb,0);
 #else
     debugstr("Can't TX a packet with SFD and FIFOP definitions.");