X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fradios%2Fccspi.c;h=eb7417ad09784b22521443895a9c56caec3e6a04;hp=ff4661694f2020cc670101b097e20e77d1c1e7b2;hb=350c674c6bcd97ec2f883b07e0cf49eb8a480183;hpb=022d9128fe8a5783e3b804581fe7996d17095ef6 diff --git a/firmware/apps/radios/ccspi.c b/firmware/apps/radios/ccspi.c index ff46616..eb7417a 100644 --- a/firmware/apps/radios/ccspi.c +++ b/firmware/apps/radios/ccspi.c @@ -1,7 +1,7 @@ /*! \file ccspi.c \author Travis Goodspeed \brief Chipcon SPI Register Interface - + Unfortunately, there is very little similarity between the CC2420 and the CC2500, to name just two of the myriad of Chipcon SPI radios. Auto-detection will be a bit difficult, but more to the @@ -12,10 +12,7 @@ #include "platform.h" #include "command.h" - -#include -#include -#include +#include //added for itoa #include "ccspi.h" #include "spi.h" @@ -52,12 +49,16 @@ void ccspisetup(){ SPIDIR|=MOSI+SCK; DIRSS; DIRCE; - + P4OUT|=BIT5; //activate CC2420 voltage regulator - P4OUT|=BIT6; //bring CC2420 out of reset - + msdelay(100); + + //Reset the CC2420. + P4OUT&=~BIT6; + P4OUT|=BIT6; + //Begin a new transaction. - CLRSS; + CLRSS; SETSS; } @@ -66,7 +67,7 @@ u8 ccspitrans8(u8 byte){ register unsigned int bit; //This function came from the CCSPI Wikipedia article. //Minor alterations. - + for (bit = 0; bit < 8; bit++) { /* write MOSI on trailing edge of previous clock */ if (byte & 0x80) @@ -74,14 +75,14 @@ u8 ccspitrans8(u8 byte){ else CLRMOSI; byte <<= 1; - + SETCLK; - + /* read MISO on trailing edge */ byte |= READMISO; CLRCLK; } - + return byte; } @@ -89,22 +90,22 @@ u8 ccspitrans8(u8 byte){ //! Writes a register u8 ccspi_regwrite(u8 reg, const u8 *buf, int len){ CLRSS; - + reg=ccspitrans8(reg); while(len--) ccspitrans8(*buf++); - + SETSS; return reg;//status } //! Reads a register u8 ccspi_regread(u8 reg, u8 *buf, int len){ CLRSS; - + reg=ccspitrans8(reg); while(len--) *buf++=ccspitrans8(0); - + SETSS; return reg;//status } @@ -114,66 +115,278 @@ void ccspi_handle_fn( uint8_t const app, uint8_t const verb, uint32_t const len){ unsigned long i; - + //debugstr("Chipcon SPI handler."); - + switch(verb){ + case PEEK: + cmddata[0]|=0x40; //Set the read bit. + //DO NOT BREAK HERE. case READ: case WRITE: + case POKE: CLRSS; //Drop !SS to begin transaction. for(i=0;i> 8) & 0xFF; + + for(i=0;i