X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fspi%2Fspi.c;h=6e503f230f41f9def34edcb494ba3fdecbf67294;hp=2b5391467bea2ee2047eb087a27850e9e875da0b;hb=e3e1bb605963def746b50f62277180e567d3b615;hpb=589872bb228d7c641d49cb60e3e3aab72e45fc82

diff --git a/firmware/apps/spi/spi.c b/firmware/apps/spi/spi.c
index 2b53914..6e503f2 100644
--- a/firmware/apps/spi/spi.c
+++ b/firmware/apps/spi/spi.c
@@ -1,5 +1,7 @@
-//GoodFET SPI Application
-//Handles basic I/O
+/*! \file spi.c
+  \author Travis Goodspeed
+  \brief SPI Master
+*/
 
 //Higher level left to client application.
 
@@ -10,41 +12,33 @@
 #include <io.h>
 #include <iomacros.h>
 
-
-//Pins and I/O
-#define SS   BIT0
-#define MOSI BIT1
-#define MISO BIT2
-#define SCK  BIT3
+#include <spi.h>
 
 //This could be more accurate.
 //Does it ever need to be?
 #define SPISPEED 0
-#define SPIDELAY(x) delay(x)
-
-#define SETMOSI P5OUT|=MOSI
-#define CLRMOSI P5OUT&=~MOSI
-#define SETCLK P5OUT|=SCK
-#define CLRCLK P5OUT&=~SCK
-#define READMISO (P5IN&MISO?1:0)
-
+#define SPIDELAY(x)
+//delay(x)
 
 
 //! Set up the pins for SPI mode.
-unsigned char spisetup(){
+void spisetup(){
+  P5OUT|=SS;
   P5DIR|=MOSI+SCK+SS;
   P5DIR&=~MISO;
+  
+  //Begin a new transaction.
+  P5OUT&=~SS; 
   P5OUT|=SS;
 }
 
-//! Read and write an SPI bit.
+
+//! Read and write an SPI byte.
 unsigned char spitrans8(unsigned char byte){
   unsigned int bit;
   //This function came from the SPI Wikipedia article.
   //Minor alterations.
   
-  P5OUT&=~SS;
-  
   for (bit = 0; bit < 8; bit++) {
     /* write MOSI on trailing edge of previous clock */
     if (byte & 0x80)
@@ -65,25 +59,208 @@ unsigned char spitrans8(unsigned char byte){
     CLRCLK;
   }
   
-  P5OUT|=SS;
- 
   return byte;
 }
 
+
+//! Enable SPI writing
+void spiflash_wrten(){
+  SETSS;
+  /*
+  P5OUT&=~SS; //Drop !SS to begin transaction.
+  spitrans8(0x04);//Write Disable
+  P5OUT|=SS;  //Raise !SS to end transaction.
+  */
+  P5OUT&=~SS; //Drop !SS to begin transaction.
+  spitrans8(0x06);//Write Enable
+  P5OUT|=SS;  //Raise !SS to end transaction.
+}
+
+
+//! Grab the SPI flash status byte.
+unsigned char spiflash_status(){
+  unsigned char c;
+  P5OUT|=SS;  //Raise !SS to end transaction.
+  P5OUT&=~SS; //Drop !SS to begin transaction.
+  spitrans8(0x05);//GET STATUS
+  c=spitrans8(0xFF);
+  P5OUT|=SS;  //Raise !SS to end transaction.
+  return c;
+}
+
+
+//! Grab the SPI flash status byte.
+void spiflash_setstatus(unsigned char c){
+  SETSS;
+  CLRSS; //Drop !SS to begin transaction.
+  spitrans8(0x01);//SET STATUS
+  spitrans8(c);
+  SETSS;  //Raise !SS to end transaction.
+  //return c;
+}
+
+
+//! Read a block to a buffer.
+void spiflash_peekblock(unsigned long adr,
+			unsigned char *buf,
+			unsigned int len){
+  unsigned char i;
+  
+  SETSS;
+  CLRSS; //Drop !SS to begin transaction.
+  spitrans8(0x03);//Flash Read Command
+  
+  //Send address
+  spitrans8((adr&0xFF0000)>>16);
+  spitrans8((adr&0xFF00)>>8);
+  spitrans8(adr&0xFF);
+  
+  for(i=0;i<len;i++)
+    buf[i]=spitrans8(0);
+  SETSS;  //Raise !SS to end transaction.
+}
+
+
+//! Read a block to a buffer.
+void spiflash_pokeblock(unsigned long adr,
+			unsigned char *buf,
+			unsigned int len){
+  unsigned char i;
+  
+  SETSS;
+  
+  spiflash_setstatus(0x02);
+  spiflash_wrten();
+  
+  CLRSS; //Drop !SS to begin transaction.
+  spitrans8(0x02); //Poke command.
+  
+  //Send address
+  spitrans8((adr&0xFF0000)>>16);
+  spitrans8((adr&0xFF00)>>8);
+  spitrans8(adr&0xFF);
+
+  for(i=0;i<len;i++)
+    spitrans8(buf[i]);
+  SETSS;  //Raise !SS to end transaction.
+  
+  while(spiflash_status()&0x01);
+  
+  return;
+}
+
+
+//! Peek some blocks.
+void spiflash_peek(unsigned char app,
+		   unsigned char verb,
+		   unsigned char len){
+  register char blocks=(len>3?cmddata[3]:1);
+  unsigned char i;
+  
+  P5OUT&=~SS; //Drop !SS to begin transaction.
+  spitrans8(0x03);//Flash Read Command
+  len=3;//write 3 byte pointer
+  for(i=0;i<len;i++)
+    spitrans8(cmddata[i]);
+  
+  //Send reply header
+  len=0x80;//128 byte chunk, repeated for each block
+  serial_tx(app);
+  serial_tx(verb);
+  serial_tx(len); //multiplied by block count.
+  
+  while(blocks--){
+    for(i=0;i<len;i++)
+      serial_tx(spitrans8(0));
+    
+    /* old fashioned
+    for(i=0;i<len;i++)
+      cmddata[i]=spitrans8(0);
+    txdata(app,verb,len);
+    */
+  }
+  P5OUT|=SS;  //Raise !SS to end transaction.
+}
+
 //! Handles a monitor command.
 void spihandle(unsigned char app,
 	       unsigned char verb,
 	       unsigned char len){
+  unsigned char i;
+  
+  //Raise !SS to end transaction, just in case we forgot.
+  P5OUT|=SS;
+  spisetup();
+  
   switch(verb){
     //PEEK and POKE might come later.
   case READ:
   case WRITE:
-    cmddata[0]=spitrans8(cmddata[0]);
-    txdata(app,verb,1);
+    P5OUT&=~SS; //Drop !SS to begin transaction.
+    for(i=0;i<len;i++)
+      cmddata[i]=spitrans8(cmddata[i]);
+    P5OUT|=SS;  //Raise !SS to end transaction.
+    txdata(app,verb,len);
     break;
+
+
+  case SPI_JEDEC://Grab 3-byte JEDEC ID.
+    P5OUT&=~SS; //Drop !SS to begin transaction.
+    spitrans8(0x9f);
+    len=3;  //Length is variable in some chips, 3 minimum.
+    for(i=0;i<len;i++)
+      cmddata[i]=spitrans8(cmddata[i]);
+    txdata(app,verb,len);
+    P5OUT|=SS;  //Raise !SS to end transaction.
+    break;
+
+
+  case PEEK://Grab 128 bytes from an SPI Flash ROM
+    spiflash_peek(app,verb,len);
+    break;
+
+
+  case POKE://Poke up bytes from an SPI Flash ROM.
+    spiflash_setstatus(0x02);
+    spiflash_wrten();
+    
+    P5OUT&=~SS;         //Drop !SS to begin transaction.
+    spitrans8(0x02);    //Poke command.
+    
+    //First three bytes are address, then data.
+    for(i=0;i<len;i++)
+      spitrans8(cmddata[i]);
+    P5OUT|=SS;          //Raise !SS to end transaction.
+    
+    
+    
+    while(spiflash_status()&0x01)
+      P1OUT^=1;
+    
+    P1OUT&=~1;
+    
+    txdata(app,verb,len);
+    break;
+
+
+  case SPI_ERASE://Erase the SPI Flash ROM.
+    spiflash_wrten();
+    P5OUT&=~SS; //Drop !SS to begin transaction.
+    spitrans8(0xC7);//Chip Erase
+    P5OUT|=SS;  //Raise !SS to end transaction.
+    
+        
+    while(spiflash_status()&0x01)//while busy
+      P1OUT^=1;
+    P1OUT&=~1;
+    
+    txdata(app,verb,0);
+    break;
+
   case SETUP:
     spisetup();
     txdata(app,verb,0);
     break;
   }
+  
 }