X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fspi%2Fspi.c;h=6e503f230f41f9def34edcb494ba3fdecbf67294;hp=e91ab6198098befa0bd402cddd9ff68a2008a38f;hb=e3e1bb605963def746b50f62277180e567d3b615;hpb=1283fdb830f9ecd0e27e10ef66927562aff674a7 diff --git a/firmware/apps/spi/spi.c b/firmware/apps/spi/spi.c index e91ab61..6e503f2 100644 --- a/firmware/apps/spi/spi.c +++ b/firmware/apps/spi/spi.c @@ -1,5 +1,7 @@ -//GoodFET SPI Application -//Handles basic I/O +/*! \file spi.c + \author Travis Goodspeed + \brief SPI Master +*/ //Higher level left to client application. @@ -15,7 +17,8 @@ //This could be more accurate. //Does it ever need to be? #define SPISPEED 0 -#define SPIDELAY(x) delay(x) +#define SPIDELAY(x) +//delay(x) //! Set up the pins for SPI mode. @@ -63,9 +66,11 @@ unsigned char spitrans8(unsigned char byte){ //! Enable SPI writing void spiflash_wrten(){ SETSS; + /* P5OUT&=~SS; //Drop !SS to begin transaction. spitrans8(0x04);//Write Disable P5OUT|=SS; //Raise !SS to end transaction. + */ P5OUT&=~SS; //Drop !SS to begin transaction. spitrans8(0x06);//Write Enable P5OUT|=SS; //Raise !SS to end transaction. @@ -139,8 +144,7 @@ void spiflash_pokeblock(unsigned long adr, spitrans8(buf[i]); SETSS; //Raise !SS to end transaction. - while(spiflash_status()&0x01) - ; + while(spiflash_status()&0x01); return; } @@ -185,7 +189,8 @@ void spihandle(unsigned char app, unsigned char i; //Raise !SS to end transaction, just in case we forgot. - P5OUT|=SS; + P5OUT|=SS; + spisetup(); switch(verb){ //PEEK and POKE might come later. @@ -202,7 +207,7 @@ void spihandle(unsigned char app, case SPI_JEDEC://Grab 3-byte JEDEC ID. P5OUT&=~SS; //Drop !SS to begin transaction. spitrans8(0x9f); - len=3; + len=3; //Length is variable in some chips, 3 minimum. for(i=0;i