X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fspi%2Fspi.c;h=7f9777b548d02fff403df12d0469c78f3c97acfe;hp=2ee2d2cf173e5d61653cce6cae3ef73051522ead;hb=c5f9be41f72eaddb734b78396ee4bf7bd6273439;hpb=3bf98a899ca8003835b69d949d299369a5d7a4f7;ds=sidebyside diff --git a/firmware/apps/spi/spi.c b/firmware/apps/spi/spi.c index 2ee2d2c..7f9777b 100644 --- a/firmware/apps/spi/spi.c +++ b/firmware/apps/spi/spi.c @@ -32,8 +32,12 @@ //! Set up the pins for SPI mode. void spisetup(){ + P5OUT|=SS; P5DIR|=MOSI+SCK+SS; P5DIR&=~MISO; + + //Begin a new transaction. + P5OUT&=~SS; P5OUT|=SS; } @@ -66,11 +70,77 @@ unsigned char spitrans8(unsigned char byte){ return byte; } +//! Enable SPI writing +void spiflash_wrten(){ + P5OUT&=~SS; //Drop !SS to begin transaction. + spitrans8(0x04);//Write Disable + P5OUT|=SS; //Raise !SS to end transaction. + P5OUT&=~SS; //Drop !SS to begin transaction. + spitrans8(0x06);//Write Enable + P5OUT|=SS; //Raise !SS to end transaction. +} + +//! Grab the SPI flash status byte. +unsigned char spiflash_status(){ + unsigned char c; + P5OUT|=SS; //Raise !SS to end transaction. + P5OUT&=~SS; //Drop !SS to begin transaction. + spitrans8(0x05);//GET STATUS + c=spitrans8(0xFF); + P5OUT|=SS; //Raise !SS to end transaction. + return c; +} +//! Grab the SPI flash status byte. +void spiflash_setstatus(unsigned char c){ + P5OUT&=~SS; //Drop !SS to begin transaction. + spitrans8(0x01);//SET STATUS + spitrans8(c); + P5OUT|=SS; //Raise !SS to end transaction. + //return c; +} + +//! Peek some blocks. +void spiflash_peek(unsigned char app, + unsigned char verb, + unsigned char len){ + register char blocks=(len>3?cmddata[3]:1); + unsigned char i,j; + + P5OUT&=~SS; //Drop !SS to begin transaction. + spitrans8(0x03);//Flash Read Command + len=3;//write 3 byte pointer + for(i=0;i