X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fspi%2Fspi.c;h=c70cdb47e6652c00a1ffbc30375a413efd92c9f0;hp=5e762050839135e5c4fc270bee9a95108e3f59a2;hb=c6e02600ef0e12eb9a7309755740a23b71a62205;hpb=fd966b09563a102ed42b1613e7fa5e934eed2656 diff --git a/firmware/apps/spi/spi.c b/firmware/apps/spi/spi.c index 5e76205..c70cdb4 100644 --- a/firmware/apps/spi/spi.c +++ b/firmware/apps/spi/spi.c @@ -31,9 +31,13 @@ //! Set up the pins for SPI mode. -unsigned char spisetup(){ +void spisetup(){ + P5OUT|=SS; P5DIR|=MOSI+SCK+SS; P5DIR&=~MISO; + + //Begin a new transaction. + P5OUT&=~SS; P5OUT|=SS; } @@ -66,24 +70,101 @@ unsigned char spitrans8(unsigned char byte){ return byte; } +//! Enable SPI writing +void spiflash_wrten(){ + P5OUT&=~SS; //Drop !SS to begin transaction. + spitrans8(0x04);//Write Disable + P5OUT|=SS; //Raise !SS to end transaction. + P5OUT&=~SS; //Drop !SS to begin transaction. + spitrans8(0x06);//Write Enable + P5OUT|=SS; //Raise !SS to end transaction. +} + +//! Grab the SPI flash status byte. +unsigned char spiflash_status(){ + unsigned char c; + P5OUT|=SS; //Raise !SS to end transaction. + P5OUT&=~SS; //Drop !SS to begin transaction. + spitrans8(0x05);//GET STATUS + c=spitrans8(0xFF); + P5OUT|=SS; //Raise !SS to end transaction. + return c; +} +//! Grab the SPI flash status byte. +void spiflash_setstatus(unsigned char c){ + P5OUT&=~SS; //Drop !SS to begin transaction. + spitrans8(0x01);//SET STATUS + spitrans8(c); + P5OUT|=SS; //Raise !SS to end transaction. + return c; +} + //! Handles a monitor command. void spihandle(unsigned char app, unsigned char verb, unsigned char len){ unsigned char i; + + + //Raise !SS to end transaction, just in case we forgot. + P5OUT|=SS; + switch(verb){ //PEEK and POKE might come later. case READ: case WRITE: P5OUT&=~SS; //Drop !SS to begin transaction. + for(i=0;i