X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fspi%2Fspi.c;h=dc1c28675750cb047d6022c021cdf5e5fcb7404e;hp=0985340ad19ef70bcd2a0ca1e170f7825c00d1a9;hb=f0b3193e5145770ef1bc255b5983e36e37ca5a9b;hpb=6dc88d2f1713d2bf9f2fabb5fbfb9f235a679b2f diff --git a/firmware/apps/spi/spi.c b/firmware/apps/spi/spi.c index 0985340..dc1c286 100644 --- a/firmware/apps/spi/spi.c +++ b/firmware/apps/spi/spi.c @@ -17,19 +17,21 @@ //This could be more accurate. //Does it ever need to be? #define SPISPEED 0 -#define SPIDELAY(x) -//delay(x) +#define SPIDELAY(x) delay(x) //! Set up the pins for SPI mode. void spisetup(){ - P5OUT|=SS; - P5DIR|=MOSI+SCK+SS; + SETSS; + P5DIR|=MOSI+SCK+BIT0; //BIT0 might be SS P5DIR&=~MISO; + DIRSS; //Begin a new transaction. - P5OUT&=~SS; - P5OUT|=SS; + + CLRSS; + SETSS; + } @@ -46,14 +48,15 @@ unsigned char spitrans8(unsigned char byte){ else CLRMOSI; byte <<= 1; - + + //SPIDELAY(100); SETCLK; + //SPIDELAY(100); /* read MISO on trailing edge */ byte |= READMISO; CLRCLK; } - return byte; } @@ -62,24 +65,24 @@ unsigned char spitrans8(unsigned char byte){ void spiflash_wrten(){ SETSS; /* - P5OUT&=~SS; //Drop !SS to begin transaction. + CLRSS; //Drop !SS to begin transaction. spitrans8(0x04);//Write Disable - P5OUT|=SS; //Raise !SS to end transaction. + SETSS; //Raise !SS to end transaction. */ - P5OUT&=~SS; //Drop !SS to begin transaction. + CLRSS; //Drop !SS to begin transaction. spitrans8(0x06);//Write Enable - P5OUT|=SS; //Raise !SS to end transaction. + SETSS; //Raise !SS to end transaction. } //! Grab the SPI flash status byte. unsigned char spiflash_status(){ unsigned char c; - P5OUT|=SS; //Raise !SS to end transaction. - P5OUT&=~SS; //Drop !SS to begin transaction. + SETSS; //Raise !SS to end transaction. + CLRSS; //Drop !SS to begin transaction. spitrans8(0x05);//GET STATUS c=spitrans8(0xFF); - P5OUT|=SS; //Raise !SS to end transaction. + SETSS; //Raise !SS to end transaction. return c; } @@ -123,7 +126,13 @@ void spiflash_pokeblock(unsigned long adr, SETSS; - //while(spiflash_status()&0x01);//minor performance impact + //if(len!=0x100) + // debugstr("Non-standard block size."); + + while(spiflash_status()&0x01);//minor performance impact + + spiflash_setstatus(0x02); + spiflash_wrten(); //Are these necessary? //spiflash_setstatus(0x02); @@ -153,8 +162,6 @@ void spiflash_pokeblocks(unsigned long adr, long off=0;//offset of this block int blen;//length of this block SETSS; - spiflash_setstatus(0x02); - spiflash_wrten(); while(off>16); + spitrans8((adr&0xFF00)>>8); + spitrans8(adr&0xFF); + + SETSS; + while(spiflash_status()&0x01);//while busy + //debugstr("Erased."); +} + + +//! Wake an EM260 Radio +void em260_wake(){ + //debugstr("Waking EM260."); + #define RST BIT6 + P2DIR|=RST; + SETRST; + delay(1024); + + CLRRST;//Wake chip. + while(P4IN&1); + SETRST;//Woken. + //debugstr("EM260 is now awake."); + delay(1024); //DO NOT REMOVE, fails without. +} +//! Handle an EM260 exchange. +void spi_rw_em260(u8 app, u8 verb, u32 len){ + unsigned long i; + u8 lastin; + + P4DIR=0; //TODO ASAP remove P4 references. + P4OUT=0xFF; + //P4REN=0xFF; + + //See GoodFETEM260.py for details. + //The EM260 requires that the host wait for the client. + + /* + if((~P4IN)&1) + debugstr("Detected HOST_INT."); + */ + + em260_wake(); + + + SETMOSI; //Autodetected SPI mode. + CLRSS; //Drop !SS to begin transaction. + //Host to slave. Ignore data. + for(i=0;i