X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fspi%2Fspi.c;h=dc1c28675750cb047d6022c021cdf5e5fcb7404e;hp=594e04fdabbf016583bccb90ef4525e45c23578d;hb=f0b3193e5145770ef1bc255b5983e36e37ca5a9b;hpb=a28d1a252666fe5077057b8598d638fc8504e29a diff --git a/firmware/apps/spi/spi.c b/firmware/apps/spi/spi.c index 594e04f..dc1c286 100644 --- a/firmware/apps/spi/spi.c +++ b/firmware/apps/spi/spi.c @@ -1,5 +1,7 @@ -//GoodFET SPI Application -//Handles basic I/O +/*! \file spi.c + \author Travis Goodspeed + \brief SPI Master +*/ //Higher level left to client application. @@ -10,42 +12,32 @@ #include #include - -//Pins and I/O -#define SS BIT0 -#define MOSI BIT1 -#define MISO BIT2 -#define SCK BIT3 - +#include "spi.h" //This could be more accurate. //Does it ever need to be? #define SPISPEED 0 #define SPIDELAY(x) delay(x) -#define SETMOSI P5OUT|=MOSI -#define CLRMOSI P5OUT&=~MOSI -#define SETCLK P5OUT|=SCK -#define CLRCLK P5OUT&=~SCK -#define READMISO (P5IN&MISO?1:0) - - //! Set up the pins for SPI mode. void spisetup(){ - P5OUT|=SS; - P5DIR|=MOSI+SCK+SS; + SETSS; + P5DIR|=MOSI+SCK+BIT0; //BIT0 might be SS P5DIR&=~MISO; + DIRSS; //Begin a new transaction. - P5OUT&=~SS; - P5OUT|=SS; + + CLRSS; + SETSS; + } //! Read and write an SPI byte. unsigned char spitrans8(unsigned char byte){ - unsigned int bit; + register unsigned int bit; //This function came from the SPI Wikipedia article. //Minor alterations. @@ -56,156 +48,316 @@ unsigned char spitrans8(unsigned char byte){ else CLRMOSI; byte <<= 1; - - /* half a clock cycle before leading/rising edge */ - SPIDELAY(SPISPEED/2); + + //SPIDELAY(100); SETCLK; - - /* half a clock cycle before trailing/falling edge */ - SPIDELAY(SPISPEED/2); - + //SPIDELAY(100); + /* read MISO on trailing edge */ byte |= READMISO; CLRCLK; } - return byte; } //! Enable SPI writing void spiflash_wrten(){ - P5OUT&=~SS; //Drop !SS to begin transaction. + SETSS; + /* + CLRSS; //Drop !SS to begin transaction. spitrans8(0x04);//Write Disable - P5OUT|=SS; //Raise !SS to end transaction. - P5OUT&=~SS; //Drop !SS to begin transaction. + SETSS; //Raise !SS to end transaction. + */ + CLRSS; //Drop !SS to begin transaction. spitrans8(0x06);//Write Enable - P5OUT|=SS; //Raise !SS to end transaction. + SETSS; //Raise !SS to end transaction. } //! Grab the SPI flash status byte. unsigned char spiflash_status(){ unsigned char c; - P5OUT|=SS; //Raise !SS to end transaction. - P5OUT&=~SS; //Drop !SS to begin transaction. + SETSS; //Raise !SS to end transaction. + CLRSS; //Drop !SS to begin transaction. spitrans8(0x05);//GET STATUS c=spitrans8(0xFF); - P5OUT|=SS; //Raise !SS to end transaction. + SETSS; //Raise !SS to end transaction. return c; } //! Grab the SPI flash status byte. void spiflash_setstatus(unsigned char c){ - P5OUT&=~SS; //Drop !SS to begin transaction. + SETSS; + CLRSS; //Drop !SS to begin transaction. spitrans8(0x01);//SET STATUS spitrans8(c); - P5OUT|=SS; //Raise !SS to end transaction. + SETSS; //Raise !SS to end transaction. //return c; } + +//! Read a block to a buffer. +void spiflash_peekblock(unsigned long adr, + unsigned char *buf, + unsigned int len){ + unsigned char i; + + SETSS; + CLRSS; //Drop !SS to begin transaction. + spitrans8(0x03);//Flash Read Command + + //Send address + spitrans8((adr&0xFF0000)>>16); + spitrans8((adr&0xFF00)>>8); + spitrans8(adr&0xFF); + + for(i=0;i>16); + spitrans8((adr&0xFF00)>>8); + spitrans8(adr&0xFF); + + for(i=0;i0x100?0x100:len-off); + //write the block + spiflash_pokeblock(adr+off, + buf+off, + blen); + //add offset + off+=blen; + } +} + + + //! Peek some blocks. void spiflash_peek(unsigned char app, unsigned char verb, - unsigned char len){ - register char blocks=(len>3?cmddata[3]:1); - unsigned char i,j; - - P5OUT&=~SS; //Drop !SS to begin transaction. + unsigned long len){ + unsigned int i; + CLRSS; //Drop !SS to begin transaction. spitrans8(0x03);//Flash Read Command len=3;//write 3 byte pointer for(i=0;i>16); + spitrans8((adr&0xFF00)>>8); + spitrans8(adr&0xFF); + + SETSS; + while(spiflash_status()&0x01);//while busy + //debugstr("Erased."); +} + + +//! Wake an EM260 Radio +void em260_wake(){ + //debugstr("Waking EM260."); + #define RST BIT6 + P2DIR|=RST; + SETRST; + delay(1024); + + CLRRST;//Wake chip. + while(P4IN&1); + SETRST;//Woken. + //debugstr("EM260 is now awake."); + delay(1024); //DO NOT REMOVE, fails without. +} +//! Handle an EM260 exchange. +void spi_rw_em260(u8 app, u8 verb, u32 len){ + unsigned long i; + u8 lastin; - /* old fashioned - for(i=0;i