X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fspi%2Fspi.c;h=dd92ba2096fc41f76cac5dbf09b7107cd70dd2a6;hp=f02d4022146479c4622f2edf15c5f23a3bfe36f5;hb=97143fece53250662a3ffd22f141619a4902eda7;hpb=78f4f21969789bec27a8e2957eb00a87d8756041 diff --git a/firmware/apps/spi/spi.c b/firmware/apps/spi/spi.c index f02d402..dd92ba2 100644 --- a/firmware/apps/spi/spi.c +++ b/firmware/apps/spi/spi.c @@ -12,7 +12,7 @@ #include #include -#include +#include "spi.h" //This could be more accurate. //Does it ever need to be? @@ -23,13 +23,14 @@ //! Set up the pins for SPI mode. void spisetup(){ - P5OUT|=SS; - P5DIR|=MOSI+SCK+SS; + SETSS; + P5DIR|=MOSI+SCK; //BIT0 might be SS P5DIR&=~MISO; + DIRSS; //Begin a new transaction. - P5OUT&=~SS; - P5OUT|=SS; + CLRSS; + SETSS; } @@ -62,24 +63,24 @@ unsigned char spitrans8(unsigned char byte){ void spiflash_wrten(){ SETSS; /* - P5OUT&=~SS; //Drop !SS to begin transaction. + CLRSS; //Drop !SS to begin transaction. spitrans8(0x04);//Write Disable - P5OUT|=SS; //Raise !SS to end transaction. + SETSS; //Raise !SS to end transaction. */ - P5OUT&=~SS; //Drop !SS to begin transaction. + CLRSS; //Drop !SS to begin transaction. spitrans8(0x06);//Write Enable - P5OUT|=SS; //Raise !SS to end transaction. + SETSS; //Raise !SS to end transaction. } //! Grab the SPI flash status byte. unsigned char spiflash_status(){ unsigned char c; - P5OUT|=SS; //Raise !SS to end transaction. - P5OUT&=~SS; //Drop !SS to begin transaction. + SETSS; //Raise !SS to end transaction. + CLRSS; //Drop !SS to begin transaction. spitrans8(0x05);//GET STATUS c=spitrans8(0xFF); - P5OUT|=SS; //Raise !SS to end transaction. + SETSS; //Raise !SS to end transaction. return c; } @@ -115,28 +116,6 @@ void spiflash_peekblock(unsigned long adr, SETSS; //Raise !SS to end transaction. } -//! Write many blocks to the SPI Flash. -void spiflash_pokeblocks(unsigned long adr, - unsigned char *buf, - unsigned int len){ - long off=0;//offset of this block - int blen;//length of this block - SETSS; - spiflash_setstatus(0x02); - spiflash_wrten(); - - while(off0x100?0x100:len-off); - //write the block - spiflash_pokeblock(adr+off, - buf+off, - blen); - //add offset - off+=blen; - } -} - //! Read a block to a buffer. void spiflash_pokeblock(unsigned long adr, unsigned char *buf, @@ -145,7 +124,13 @@ void spiflash_pokeblock(unsigned long adr, SETSS; - //while(spiflash_status()&0x01);//minor performance impact + //if(len!=0x100) + // debugstr("Non-standard block size."); + + while(spiflash_status()&0x01);//minor performance impact + + spiflash_setstatus(0x02); + spiflash_wrten(); //Are these necessary? //spiflash_setstatus(0x02); @@ -168,12 +153,34 @@ void spiflash_pokeblock(unsigned long adr, } +//! Write many blocks to the SPI Flash. +void spiflash_pokeblocks(unsigned long adr, + unsigned char *buf, + unsigned int len){ + long off=0;//offset of this block + int blen;//length of this block + SETSS; + + while(off0x100?0x100:len-off); + //write the block + spiflash_pokeblock(adr+off, + buf+off, + blen); + //add offset + off+=blen; + } +} + + + //! Peek some blocks. void spiflash_peek(unsigned char app, unsigned char verb, unsigned long len){ unsigned int i; - P5OUT&=~SS; //Drop !SS to begin transaction. + CLRSS; //Drop !SS to begin transaction. spitrans8(0x03);//Flash Read Command len=3;//write 3 byte pointer for(i=0;i>16); + spitrans8((adr&0xFF00)>>8); + spitrans8(adr&0xFF); + + SETSS; + while(spiflash_status()&0x01);//while busy + //debugstr("Erased."); +} + + //! Handles a monitor command. void spihandle(unsigned char app, unsigned char verb, @@ -196,29 +227,29 @@ void spihandle(unsigned char app, unsigned long i; //Raise !SS to end transaction, just in case we forgot. - P5OUT|=SS; + SETSS; spisetup(); switch(verb){ //PEEK and POKE might come later. case READ: case WRITE: - P5OUT&=~SS; //Drop !SS to begin transaction. + CLRSS; //Drop !SS to begin transaction. for(i=0;i