X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fspi%2Fspi.c;h=e07cdb544a43d8a8674eb51162bf4bc2f478e095;hp=f02d4022146479c4622f2edf15c5f23a3bfe36f5;hb=5fb0341d348e101b30794945a6c91546e25e8e7b;hpb=78f4f21969789bec27a8e2957eb00a87d8756041 diff --git a/firmware/apps/spi/spi.c b/firmware/apps/spi/spi.c index f02d402..e07cdb5 100644 --- a/firmware/apps/spi/spi.c +++ b/firmware/apps/spi/spi.c @@ -12,24 +12,48 @@ #include #include -#include +#include "spi.h" + +//! Handles a monitor command. +void spi_handle_fn( uint8_t const app, + uint8_t const verb, + uint32_t const len); + +// define the spi app's app_t +app_t const spi_app = { + + /* app number */ + SPI, + + /* handle fn */ + spi_handle_fn, + + /* name */ + "SPI", + + /* desc */ + "\tThe SPI app handles the SPI bus protocol, turning\n" + "\tyour GoodFET into a USB-to-SPI adapter.\n" +}; //This could be more accurate. //Does it ever need to be? #define SPISPEED 0 -#define SPIDELAY(x) -//delay(x) +#define SPIDELAY(x) delay(x) //! Set up the pins for SPI mode. void spisetup(){ - P5OUT|=SS; - P5DIR|=MOSI+SCK+SS; + SETSS; + P5DIR|=MOSI+SCK+BIT0; //BIT0 might be SS P5DIR&=~MISO; + DIRSS; //Begin a new transaction. - P5OUT&=~SS; - P5OUT|=SS; + + CLRSS; + SETSS; + } @@ -46,14 +70,15 @@ unsigned char spitrans8(unsigned char byte){ else CLRMOSI; byte <<= 1; - + + //SPIDELAY(100); SETCLK; + //SPIDELAY(100); /* read MISO on trailing edge */ byte |= READMISO; CLRCLK; } - return byte; } @@ -62,24 +87,24 @@ unsigned char spitrans8(unsigned char byte){ void spiflash_wrten(){ SETSS; /* - P5OUT&=~SS; //Drop !SS to begin transaction. + CLRSS; //Drop !SS to begin transaction. spitrans8(0x04);//Write Disable - P5OUT|=SS; //Raise !SS to end transaction. + SETSS; //Raise !SS to end transaction. */ - P5OUT&=~SS; //Drop !SS to begin transaction. + CLRSS; //Drop !SS to begin transaction. spitrans8(0x06);//Write Enable - P5OUT|=SS; //Raise !SS to end transaction. + SETSS; //Raise !SS to end transaction. } //! Grab the SPI flash status byte. unsigned char spiflash_status(){ unsigned char c; - P5OUT|=SS; //Raise !SS to end transaction. - P5OUT&=~SS; //Drop !SS to begin transaction. + SETSS; //Raise !SS to end transaction. + CLRSS; //Drop !SS to begin transaction. spitrans8(0x05);//GET STATUS c=spitrans8(0xFF); - P5OUT|=SS; //Raise !SS to end transaction. + SETSS; //Raise !SS to end transaction. return c; } @@ -115,28 +140,6 @@ void spiflash_peekblock(unsigned long adr, SETSS; //Raise !SS to end transaction. } -//! Write many blocks to the SPI Flash. -void spiflash_pokeblocks(unsigned long adr, - unsigned char *buf, - unsigned int len){ - long off=0;//offset of this block - int blen;//length of this block - SETSS; - spiflash_setstatus(0x02); - spiflash_wrten(); - - while(off0x100?0x100:len-off); - //write the block - spiflash_pokeblock(adr+off, - buf+off, - blen); - //add offset - off+=blen; - } -} - //! Read a block to a buffer. void spiflash_pokeblock(unsigned long adr, unsigned char *buf, @@ -145,7 +148,13 @@ void spiflash_pokeblock(unsigned long adr, SETSS; - //while(spiflash_status()&0x01);//minor performance impact + //if(len!=0x100) + // debugstr("Non-standard block size."); + + while(spiflash_status()&0x01);//minor performance impact + + spiflash_setstatus(0x02); + spiflash_wrten(); //Are these necessary? //spiflash_setstatus(0x02); @@ -168,12 +177,34 @@ void spiflash_pokeblock(unsigned long adr, } +//! Write many blocks to the SPI Flash. +void spiflash_pokeblocks(unsigned long adr, + unsigned char *buf, + unsigned int len){ + long off=0;//offset of this block + int blen;//length of this block + SETSS; + + while(off0x100?0x100:len-off); + //write the block + spiflash_pokeblock(adr+off, + buf+off, + blen); + //add offset + off+=blen; + } +} + + + //! Peek some blocks. void spiflash_peek(unsigned char app, unsigned char verb, unsigned long len){ unsigned int i; - P5OUT&=~SS; //Drop !SS to begin transaction. + CLRSS; //Drop !SS to begin transaction. spitrans8(0x03);//Flash Read Command len=3;//write 3 byte pointer for(i=0;i>16); + spitrans8((adr&0xFF00)>>8); + spitrans8(adr&0xFF); + + SETSS; + while(spiflash_status()&0x01);//while busy + //debugstr("Erased."); +} - case SPI_ERASE://Erase the SPI Flash ROM. - spiflash_wrten(); - P5OUT&=~SS; //Drop !SS to begin transaction. - spitrans8(0xC7);//Chip Erase - P5OUT|=SS; //Raise !SS to end transaction. +//! Wake an EM260 Radio +void em260_wake(){ + //debugstr("Waking EM260."); + #define RST BIT6 + P2DIR|=RST; + SETRST; + delay(1024); + + CLRRST;//Wake chip. + while(P4IN&1); + SETRST;//Woken. + //debugstr("EM260 is now awake."); + delay(1024); //DO NOT REMOVE, fails without. +} +//! Handle an EM260 exchange. +void spi_rw_em260(u8 app, u8 verb, u32 len){ + unsigned long i; + u8 lastin; + P4DIR=0; //TODO ASAP remove P4 references. + P4OUT=0xFF; + //P4REN=0xFF; - while(spiflash_status()&0x01)//while busy - P1OUT^=1; - P1OUT&=~1; + //See GoodFETEM260.py for details. + //The EM260 requires that the host wait for the client. - txdata(app,verb,0); - break; - - case SETUP: - spisetup(); - txdata(app,verb,0); - break; + /* + if((~P4IN)&1) + debugstr("Detected HOST_INT."); + */ + + em260_wake(); + + + SETMOSI; //Autodetected SPI mode. + CLRSS; //Drop !SS to begin transaction. + //Host to slave. Ignore data. + for(i=0;i