X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fspi%2Fspi.c;h=eed955333c6b42dc0cfb175b08c51602ce7cddb1;hp=ce21cb8b6beb3c6c1a0410dcc52a543d1bf96a8e;hb=30b52ae1a038f8ad3c563bf8e12f3a849abf8704;hpb=f4a6b415e762bcdc560f3ea655851d16f483ea5a

diff --git a/firmware/apps/spi/spi.c b/firmware/apps/spi/spi.c
index ce21cb8..eed9553 100644
--- a/firmware/apps/spi/spi.c
+++ b/firmware/apps/spi/spi.c
@@ -12,7 +12,7 @@
 #include <io.h>
 #include <iomacros.h>
 
-#include <spi.h>
+#include "spi.h"
 
 //This could be more accurate.
 //Does it ever need to be?
@@ -23,19 +23,20 @@
 
 //! Set up the pins for SPI mode.
 void spisetup(){
-  P5OUT|=SS;
-  P5DIR|=MOSI+SCK+SS;
+  SETSS;
+  P5DIR|=MOSI+SCK+BIT0; //BIT0 might be SS
   P5DIR&=~MISO;
+  DIRSS;
   
   //Begin a new transaction.
-  P5OUT&=~SS; 
-  P5OUT|=SS;
+  CLRSS; 
+  SETSS;
 }
 
 
 //! Read and write an SPI byte.
 unsigned char spitrans8(unsigned char byte){
-  unsigned int bit;
+  register unsigned int bit;
   //This function came from the SPI Wikipedia article.
   //Minor alterations.
   
@@ -47,18 +48,12 @@ unsigned char spitrans8(unsigned char byte){
       CLRMOSI;
     byte <<= 1;
  
-    /* half a clock cycle before leading/rising edge */
-    SPIDELAY(SPISPEED/2);
     SETCLK;
- 
-    /* half a clock cycle before trailing/falling edge */
-    SPIDELAY(SPISPEED/2);
- 
+  
     /* read MISO on trailing edge */
     byte |= READMISO;
     CLRCLK;
   }
-  
   return byte;
 }
 
@@ -67,24 +62,24 @@ unsigned char spitrans8(unsigned char byte){
 void spiflash_wrten(){
   SETSS;
   /*
-  P5OUT&=~SS; //Drop !SS to begin transaction.
+  CLRSS; //Drop !SS to begin transaction.
   spitrans8(0x04);//Write Disable
-  P5OUT|=SS;  //Raise !SS to end transaction.
+  SETSS;  //Raise !SS to end transaction.
   */
-  P5OUT&=~SS; //Drop !SS to begin transaction.
+  CLRSS; //Drop !SS to begin transaction.
   spitrans8(0x06);//Write Enable
-  P5OUT|=SS;  //Raise !SS to end transaction.
+  SETSS;  //Raise !SS to end transaction.
 }
 
 
 //! Grab the SPI flash status byte.
 unsigned char spiflash_status(){
   unsigned char c;
-  P5OUT|=SS;  //Raise !SS to end transaction.
-  P5OUT&=~SS; //Drop !SS to begin transaction.
+  SETSS;  //Raise !SS to end transaction.
+  CLRSS; //Drop !SS to begin transaction.
   spitrans8(0x05);//GET STATUS
   c=spitrans8(0xFF);
-  P5OUT|=SS;  //Raise !SS to end transaction.
+  SETSS;  //Raise !SS to end transaction.
   return c;
 }
 
@@ -120,18 +115,26 @@ void spiflash_peekblock(unsigned long adr,
   SETSS;  //Raise !SS to end transaction.
 }
 
-
 //! Read a block to a buffer.
 void spiflash_pokeblock(unsigned long adr,
 			unsigned char *buf,
 			unsigned int len){
-  unsigned char i;
+  unsigned int i;
   
   SETSS;
   
+  //if(len!=0x100)
+  //  debugstr("Non-standard block size.");
+  
+  while(spiflash_status()&0x01);//minor performance impact
+  
   spiflash_setstatus(0x02);
   spiflash_wrten();
   
+  //Are these necessary?
+  //spiflash_setstatus(0x02);
+  //spiflash_wrten();
+  
   CLRSS; //Drop !SS to begin transaction.
   spitrans8(0x02); //Poke command.
   
@@ -144,18 +147,39 @@ void spiflash_pokeblock(unsigned long adr,
     spitrans8(buf[i]);
   SETSS;  //Raise !SS to end transaction.
   
-  while(spiflash_status()&0x01);
-  
+  while(spiflash_status()&0x01);//minor performance impact
   return;
 }
 
 
+//! Write many blocks to the SPI Flash.
+void spiflash_pokeblocks(unsigned long adr,
+			 unsigned char *buf,
+			 unsigned int len){
+  long off=0;//offset of this block
+  int blen;//length of this block
+  SETSS;
+  
+  while(off<len){
+    //calculate block length
+    blen=(len-off>0x100?0x100:len-off);
+    //write the block
+    spiflash_pokeblock(adr+off,
+		       buf+off,
+		       blen);
+    //add offset
+    off+=blen;
+  }
+}
+
+
+
 //! Peek some blocks.
 void spiflash_peek(unsigned char app,
 		   unsigned char verb,
 		   unsigned long len){
   unsigned int i;
-  P5OUT&=~SS; //Drop !SS to begin transaction.
+  CLRSS; //Drop !SS to begin transaction.
   spitrans8(0x03);//Flash Read Command
   len=3;//write 3 byte pointer
   for(i=0;i<len;i++)
@@ -168,7 +192,46 @@ void spiflash_peek(unsigned char app,
   while(len--)
     serial_tx(spitrans8(0));
   
-  P5OUT|=SS;  //Raise !SS to end transaction.
+  SETSS;  //Raise !SS to end transaction.
+}
+
+
+//! Erase a sector.
+void spiflash_erasesector(unsigned long adr){
+  //debugstr("Erasing a 4kB sector.");
+
+  //Write enable.
+  spiflash_wrten();
+
+  //Begin
+  CLRSS;
+
+  //Second command.
+  spitrans8(0x20);
+  //Send address
+  spitrans8((adr&0xFF0000)>>16);
+  spitrans8((adr&0xFF00)>>8);
+  spitrans8(adr&0xFF);
+
+  SETSS;
+  while(spiflash_status()&0x01);//while busy
+  //debugstr("Erased.");
+}
+
+
+//! Wake an EM260 Radio
+void em260_wake(){
+  //debugstr("Waking EM260.");
+  #define RST BIT6
+  P2DIR|=RST;
+  SETRST;
+  delay(1024);
+  
+  CLRRST;//Wake chip.
+  while(P4IN&1);
+  SETRST;//Woken.
+  //debugstr("EM260 is now awake.");
+  delay(1024);  //DO NOT REMOVE, fails without.
 }
 
 //! Handles a monitor command.
@@ -178,69 +241,87 @@ void spihandle(unsigned char app,
   unsigned long i;
   
   //Raise !SS to end transaction, just in case we forgot.
-  P5OUT|=SS;
+  SETSS;
   spisetup();
   
   switch(verb){
     //PEEK and POKE might come later.
   case READ:
   case WRITE:
-    P5OUT&=~SS; //Drop !SS to begin transaction.
+    CLRSS; //Drop !SS to begin transaction.
     for(i=0;i<len;i++)
       cmddata[i]=spitrans8(cmddata[i]);
-    P5OUT|=SS;  //Raise !SS to end transaction.
+    SETSS;  //Raise !SS to end transaction.
     txdata(app,verb,len);
     break;
-
-
+    
+  case SPI_RW_EM260:  //SPI exchange with an EM260
+    P4DIR=0; //TODO ASAP remove P4 references.
+    P4OUT=0;
+    
+    //See GoodFETEM260.py for details.
+    //The EM260 requires that the host wait for the client.
+    
+    em260_wake();
+    
+    SETMOSI; //Autodetected SPI mode.
+    CLRSS; //Drop !SS to begin transaction.
+    //Host to slave.  Ignore data.
+    for(i=0;i<len;i++)
+      spitrans8(cmddata[i]);
+    //debugstr("Finished transmission to EM260.");
+    
+    //Could also wait for nHOST_INT to drop.
+    i=0xffff;
+    while((cmddata[0]=spitrans8(0xFF))==0xFF
+	  && --i);
+    if(!i)
+      debugstr("Gave up on host interrupt.");
+        
+    len=32;
+    for(i=1;i<len;i++)
+      cmddata[i]=spitrans8(0xFF);
+    
+    
+    SETSS;  //Raise !SS to end transaction.
+    txdata(app,verb,len);
+    break;
+    
+    
   case SPI_JEDEC://Grab 3-byte JEDEC ID.
-    P5OUT&=~SS; //Drop !SS to begin transaction.
+    CLRSS; //Drop !SS to begin transaction.
     spitrans8(0x9f);
     len=3;  //Length is variable in some chips, 3 minimum.
     for(i=0;i<len;i++)
       cmddata[i]=spitrans8(cmddata[i]);
     txdata(app,verb,len);
-    P5OUT|=SS;  //Raise !SS to end transaction.
+    SETSS;  //Raise !SS to end transaction.
     break;
-
-
+    
   case PEEK://Grab 128 bytes from an SPI Flash ROM
     spiflash_peek(app,verb,len);
     break;
 
 
   case POKE://Poke up bytes from an SPI Flash ROM.
-    spiflash_setstatus(0x02);
-    spiflash_wrten();
+    spiflash_pokeblocks(cmddatalong[0],//adr
+			cmddata+4,//buf
+			len-4);//len    
     
-    P5OUT&=~SS;         //Drop !SS to begin transaction.
-    spitrans8(0x02);    //Poke command.
-    
-    //First three bytes are address, then data.
-    for(i=0;i<len;i++)
-      spitrans8(cmddata[i]);
-    P5OUT|=SS;          //Raise !SS to end transaction.
-    
-    
-    while(spiflash_status()&0x01)
-      P1OUT^=1;
-    
-    P1OUT&=~1;
-    
-    txdata(app,verb,len);
+    txdata(app,verb,0);
     break;
 
 
   case SPI_ERASE://Erase the SPI Flash ROM.
     spiflash_wrten();
-    P5OUT&=~SS; //Drop !SS to begin transaction.
+    CLRSS; //Drop !SS to begin transaction.
     spitrans8(0xC7);//Chip Erase
-    P5OUT|=SS;  //Raise !SS to end transaction.
+    SETSS;  //Raise !SS to end transaction.
     
     
     while(spiflash_status()&0x01)//while busy
-      P1OUT^=1;
-    P1OUT&=~1;
+      PLEDOUT^=PLEDPIN;
+    PLEDOUT&=~PLEDPIN;
     
     txdata(app,verb,0);
     break;