X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fapps%2Fspi%2Fspi.c;h=eed955333c6b42dc0cfb175b08c51602ce7cddb1;hp=fc310389e2f0f1fbf551e59d81cfa619528ea83b;hb=30b52ae1a038f8ad3c563bf8e12f3a849abf8704;hpb=0351243d52f70e34790269e600c65413ddb4bc7c diff --git a/firmware/apps/spi/spi.c b/firmware/apps/spi/spi.c index fc31038..eed9553 100644 --- a/firmware/apps/spi/spi.c +++ b/firmware/apps/spi/spi.c @@ -23,13 +23,14 @@ //! Set up the pins for SPI mode. void spisetup(){ - P5OUT|=SS; - P5DIR|=MOSI+SCK+SS; + SETSS; + P5DIR|=MOSI+SCK+BIT0; //BIT0 might be SS P5DIR&=~MISO; + DIRSS; //Begin a new transaction. - P5OUT&=~SS; - P5OUT|=SS; + CLRSS; + SETSS; } @@ -53,7 +54,6 @@ unsigned char spitrans8(unsigned char byte){ byte |= READMISO; CLRCLK; } - return byte; } @@ -62,24 +62,24 @@ unsigned char spitrans8(unsigned char byte){ void spiflash_wrten(){ SETSS; /* - P5OUT&=~SS; //Drop !SS to begin transaction. + CLRSS; //Drop !SS to begin transaction. spitrans8(0x04);//Write Disable - P5OUT|=SS; //Raise !SS to end transaction. + SETSS; //Raise !SS to end transaction. */ - P5OUT&=~SS; //Drop !SS to begin transaction. + CLRSS; //Drop !SS to begin transaction. spitrans8(0x06);//Write Enable - P5OUT|=SS; //Raise !SS to end transaction. + SETSS; //Raise !SS to end transaction. } //! Grab the SPI flash status byte. unsigned char spiflash_status(){ unsigned char c; - P5OUT|=SS; //Raise !SS to end transaction. - P5OUT&=~SS; //Drop !SS to begin transaction. + SETSS; //Raise !SS to end transaction. + CLRSS; //Drop !SS to begin transaction. spitrans8(0x05);//GET STATUS c=spitrans8(0xFF); - P5OUT|=SS; //Raise !SS to end transaction. + SETSS; //Raise !SS to end transaction. return c; } @@ -179,7 +179,7 @@ void spiflash_peek(unsigned char app, unsigned char verb, unsigned long len){ unsigned int i; - P5OUT&=~SS; //Drop !SS to begin transaction. + CLRSS; //Drop !SS to begin transaction. spitrans8(0x03);//Flash Read Command len=3;//write 3 byte pointer for(i=0;i