X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fgoodfet.c;h=5d33b39981c10d119e9aff75b5d07753ab893ad6;hp=b9c500c8ca388f7482f5cd3e7046a2bec7afdaf9;hb=0fdf6e0b883ba3f7661e555145a3601609729e89;hpb=21ff17d2af1e50542d9343d7177269a8910ebbe3

diff --git a/firmware/goodfet.c b/firmware/goodfet.c
index b9c500c..5d33b39 100644
--- a/firmware/goodfet.c
+++ b/firmware/goodfet.c
@@ -15,78 +15,21 @@
 #define RESET 0x80      // not a real app -- causes firmware to reset
 #define DEBUGAPP 0xFF
 
-//! Initialize registers and all that jazz.
-void init()
-{
-	WDTCTL = WDTPW + WDTHOLD;					// Stop watchdog timer
-
-	//LED out and on.
-	PLEDDIR |= PLEDPIN;
-	PLEDOUT &= ~PLEDPIN;
-
-
-	/* P5.0 out and low; this is chosen for the PIC app (in which P5.0
-	 is !MCLR) to ensure that an attached PIC chip, if present, is
-	 immediately driven to reset state. A brief explanation of why this
-	 is important follows.
-
-	At least dsPIC33F and PIC24H --and very likely other 16-bit PIC
-	families-- draw a large amount of current when running, especially
-	when using a fast clock: from 60 mA up to approx. 90 mA.  If the
-	PIC target begins to run before the client can request a new ICSP
-	session, which requires much less current (e.g., less than 2 mA),
-	then the MSP430 chip on the GoodFET will fail to start and the FTDI
-	may have trouble communicating with the client.	The latter likely
-	relates to the FTDI on-chip 3V3 regulator being specified up to
-	only 50 mA. */
-
-
-	//P5REN &= ~BIT0; //DO NOT UNCOMMENT.  Breaks GF1x support.
-
-	//This will have to be cut soon.	Use pulling resistors instead.
-	/*
-	P5DIR |= BIT0;
-	P5OUT &= ~BIT0;
-	*/
-
-	//Setup clocks, unique to each '430.
-	msp430_init_dco();
-	msp430_init_uart();
-
-	//DAC should be at full voltage if it exists.
-#ifdef DAC12IR
-	//glitchvoltages(0xfff,0xfff);
-	ADC12CTL0 = REF2_5V + REFON;					// Internal 2.5V ref on
-	//for(i=0;i!=0xFFFF;i++) asm("nop"); //DO NOT UNCOMMENT, breaks GCC4
-	DAC12_0CTL = DAC12IR + DAC12AMP_5 + DAC12ENC; // Int ref gain 1
-	DAC12_0DAT = 0xFFF; //Max voltage 0xfff
-	DAC12_1CTL = DAC12IR + DAC12AMP_5 + DAC12ENC; // Int ref gain 1
-	DAC12_1DAT = 0x000; //Min voltage 0x000
+//! General init function, calls platform-specific one.
+void init(){
+#ifdef MSP430
+  msp430_init();
+#else
+#warning "No init() routine for this platform!"
 #endif
 
-	/** FIXME
-	  
-	  This part is really ugly.  GSEL (P5.7) must be high to select
-	  normal voltage, but a lot of applications light to swing it low
-	  to be a nuissance.  To get around this, we assume that anyone
-	  with a glitching FET will also have a DAC, then we set that DAC
-	  to a high voltage.
-	  
-	  At some point, each target must be sanitized to show that it
-	  doesn't clear P5OUT or P5DIR.
-	*/
-	P5DIR|=BIT7; P5OUT=BIT7; //Normal Supply
-	//P5DIR&=~BIT7; //Glitch Supply
-
-	//Enable Interrupts.
-	//eint();
-	
 #ifdef INITPLATFORM
-	INITPLATFORM
+  INITPLATFORM
 #endif
 }
 
 
+
 //! Handle a command.
 void handle(uint8_t const app,
 			uint8_t const verb,