X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Finclude%2Fchipcon.h;h=bf471e6f2fab06469c3fb739fc3df4cb5f98d21d;hp=ece1e5340216aeeff2853f1133c064a902bf989d;hb=bd6ced95abc5725c991fc100d94a023b27c9e159;hpb=ae09939eb8c62c83f244527e7916cee5f9145e6c diff --git a/firmware/include/chipcon.h b/firmware/include/chipcon.h index ece1e53..bf471e6 100644 --- a/firmware/include/chipcon.h +++ b/firmware/include/chipcon.h @@ -3,6 +3,21 @@ \brief Chipcon application functions. */ +#include "command.h" + +//Chipcon command definitions. +#define CCCMD_CHIP_ERASE 0x14 + +//1D or 19? +#define CCCMD_WR_CONFIG 0x1D +#define CCCMD_RD_CONFIG 0x24 +#define CCCMD_READ_STATUS 0x34 +#define CCCMD_GET_CHIP_ID 0x68 +#define CCCMD_GET_PC 0x28 +#define CCCMD_HALT 0x44 +#define CCCMD_RESUME 0x4C +#define CCCMD_STEP_INSTR 0x5C +#define CCCMD_DEBUG_INSTR 0x54 //! Erase a chipcon chip. void cc_chip_erase(); @@ -24,6 +39,10 @@ void cc_debug_instr(unsigned char); unsigned char cc_peekcodebyte(unsigned long adr); //!Read a byte of data memory. unsigned char cc_peekdatabyte(unsigned int adr); +//! Fetch a byte of IRAM. +u8 cc_peekirambyte(u8 adr); +//! Write a byte of IRAM. +u8 cc_pokeirambyte(u8 adr, u8 val); //! Set a byte of data memory. unsigned char cc_pokedatabyte(unsigned int adr, unsigned char val); @@ -33,10 +52,55 @@ unsigned char cc_debug(unsigned char len, unsigned char b, unsigned char c); +//! Populates flash buffer in xdata. +void cc_write_flash_buffer(u8 *data, u16 len); +//! Populates flash buffer in xdata. +void cc_write_xdata(u16 adr, u8 *data, u16 len); +//! Copies flash buffer to flash. +void cc_write_flash_page(u32 adr); +//! Set the Chipcon's Program Counter +void cc_set_pc(u32 adr); + //! Halt the CPU. void cc_halt(); //! Resume the CPU. void cc_resume(); //! Step an instruction void cc_step_instr(); +//! Locks the chip. +void cc_lockchip(); + +#define CC_STATUS_ERASED 0x80 +#define CC_STATUS_PCONIDLE 0x40 +#define CC_STATUS_CPUHALTED 0x20 +#define CC_STATUS_PM0 0x10 +#define CC_STATUS_HALTSTATUS 0x08 +#define CC_STATUS_LOCKED 0x04 +#define CC_STATUS_OSCSTABLE 0x02 +#define CC_STATUS_OVERFLOW 0x01 +//CHIPCON commands +#define CC_CHIP_ERASE 0x80 +#define CC_WR_CONFIG 0x81 +#define CC_RD_CONFIG 0x82 +#define CC_GET_PC 0x83 +#define CC_READ_STATUS 0x84 +#define CC_SET_HW_BRKPNT 0x85 +#define CC_HALT 0x86 +#define CC_RESUME 0x87 +#define CC_DEBUG_INSTR 0x88 +#define CC_STEP_INSTR 0x89 +#define CC_STEP_REPLACE 0x8a +#define CC_GET_CHIP_ID 0x8b +//CHIPCON macros +#define CC_READ_CODE_MEMORY 0x90 +#define CC_READ_XDATA_MEMORY 0x91 +#define CC_WRITE_XDATA_MEMORY 0x92 +#define CC_SET_PC 0x93 +#define CC_CLOCK_INIT 0x94 +#define CC_WRITE_FLASH_PAGE 0x95 +#define CC_READ_FLASH_PAGE 0x96 +#define CC_MASS_ERASE_FLASH 0x97 +#define CC_PROGRAM_FLASH 0x98 +#define CC_WIPEFLASHBUFFER 0x99 +#define CC_LOCKCHIP 0x9A