X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Finclude%2Fjtagarm7.h;h=921deea2cfc7e0a8937059651c824e8b93da01ca;hp=dad30bcc2e2358fda2ab332016f9c91881ae6c25;hb=d20a94438bdb6f1e14374b2ec3c08529316714e9;hpb=78b9aa88dbfedd83c38c878d9f423af7da7cd36a

diff --git a/firmware/include/jtagarm7.h b/firmware/include/jtagarm7.h
index dad30bc..921deea 100644
--- a/firmware/include/jtagarm7.h
+++ b/firmware/include/jtagarm7.h
@@ -8,60 +8,17 @@
 #define JTAGSTATE_ARM 0         // bit 4 on dbg status reg is low
 #define JTAGSTATE_THUMB 1
 
-#define ARMTCKTOCK  CLRTCK; PLEDOUT^=PLEDPIN; SETTCK; PLEDOUT^=PLEDPIN;
-// ASSUME RUN-TEST/IDLE STATE
-#define SHIFT_IR    SETTMS;TCKTOCK;TCKTOCK;CLRTMS;TCKTOCK;TCKTOCK;
-#define SHIFT_DR    SETTMS;TCKTOCK;CLRTMS;TCKTOCK;TCKTOCK;
-
-
-
 unsigned char current_chain;
 unsigned char current_dbgstate = -1;
 //unsigned char last_halt_debug_state = -1;
 //unsigned long last_halt_pc = -1;
 
 
-//void jtag_goto_shift_ir();
-//void jtag_goto_shift_dr();
-//void jtag_reset_to_runtest_idle();
-//void jtag_arm_tcktock();
-
-
-// JTAGARM7TDMI Commands
-
-//! Write data to address.
-unsigned long jtagarm7tdmi_writemem(unsigned long adr, unsigned long data);
-//! Read data from address
-unsigned long jtagarm7tdmi_readmem(unsigned long adr);
-
-//! Halt the CPU
-unsigned long jtagarm7tdmi_haltcpu();
-//! Release the CPU
-unsigned long jtagarm7tdmi_releasecpu();
-
-//! Set the program counter.
-void jtagarm7tdmi_setpc(unsigned long adr);
-
-//! Write data to address.
-unsigned long jtagarm7tdmi_writeflash(unsigned long adr, unsigned long data);
-
+// JTAGARM7 Commands
 
 //! Start JTAG
 void jtagarm7tdmi_start(void);
-//! Reset TAP State Machine
-void jtagarm7tdmi_resettap();
-
-//! ARM-specific JTAG bit-transfer
-unsigned long jtagarmtransn(unsigned long word, unsigned char bitcount, unsigned char lsb, unsigned char end, unsigned char retidle);
-
-//! Grab debug register - Expect chain 2 to be selected
-unsigned long jtagarm7tdmi_get_dbgstate() ;
-//! Grab the core ID.
-unsigned long jtagarm7tdmi_idcode();
-//!  Connect Bypass Register to TDO/TDI
-unsigned char jtagarm7tdmi_bypass();
-//!  Connect the appropriate scan chain to TDO/TDI
-unsigned long jtagarm7tdmi_scan_intest(int n);
+
 //!  Set a 32-bit ARM register
 void jtagarm7tdmi_set_register(unsigned long reg, unsigned long val);
 //!  Get a 32-bit ARM register
@@ -150,7 +107,7 @@ The least significant bit of the instruction register is scanned in and scanned
 #define ARM_INSTR_BX_R0             0xe12fff10L
 #define ARM_INSTR_STR_Rx_r14        0xe58f0000L // from atmel docs
 #define ARM_READ_REG                ARM_INSTR_STR_Rx_r14
-#define ARM_INSTR_LDR_Rx_r14        0xe59f0000L // from atmel docs
+#define ARM_INSTR_LDR_Rx_r14        0xe5900000L // NOT from atmel docs (e59e0000L is from atmel docs)
 #define ARM_WRITE_REG               ARM_INSTR_LDR_Rx_r14
 #define ARM_INSTR_LDR_R1_r0_4       0xe4901004L
 #define ARM_READ_MEM                ARM_INSTR_LDR_R1_r0_4
@@ -171,8 +128,12 @@ The least significant bit of the instruction register is scanned in and scanned
 #define THUMB_READ_REG              THUMB_INSTR_STR_R0_r0
 #define THUMB_INSTR_MOV_R0_PC       0x46b846b8L
 #define THUMB_INSTR_MOV_PC_R0       0x46474647L
+#define THUMB_INSTR_MOV_HiLo        0x46404640L
+#define THUMB_INSTR_MOV_LoHi        0x46804680L
 #define THUMB_INSTR_BX_PC           0x47784778L
 #define THUMB_INSTR_NOP             0x1c001c00L
+#define THUMB_SWAP_HiLo             0
+#define THUMB_SWAP_LoHi             1
 #define ARM_REG_PC                  15
 
 #define JTAG_ARM7TDMI_DBG_DBGACK    1