X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Finclude%2Fspi.h;h=0f272daeabb6f0357083ea99b781a404efc39c58;hp=c39766d5ea501bdf78de425510bbb0bfe154959f;hb=a031b4a563978102c664466d1e91a9c3ab0553dd;hpb=ae09939eb8c62c83f244527e7916cee5f9145e6c;ds=sidebyside

diff --git a/firmware/include/spi.h b/firmware/include/spi.h
index c39766d..0f272da 100644
--- a/firmware/include/spi.h
+++ b/firmware/include/spi.h
@@ -3,18 +3,58 @@
   \brief Definitions for the SPI application.
 */
 
+#ifndef SPI_H
+#define SPI_H
+
+#include "app.h"
+
+#define SPI 0x01
 
 //Pins and I/O
-#define SS   BIT0
 #define MOSI BIT1
 #define MISO BIT2
 #define SCK  BIT3
 
-#define SETSS P5OUT|=SS
-#define CLRSS P5OUT&=~SS
+#define SETMOSI SPIOUT|=MOSI
+#define CLRMOSI SPIOUT&=~MOSI
+#define SETCLK SPIOUT|=SCK
+#define CLRCLK SPIOUT&=~SCK
+#define READMISO (SPIIN&MISO?1:0)
+
+//FIXME this should be defined by the platform.
+#define SETTST P4OUT|=TST
+#define CLRTST P4OUT&=~TST
+#define SETRST P2OUT|=RST
+#define CLRRST P2OUT&=~RST
+
+//! Set up the pins for SPI mode.
+void spisetup();
+
+//! Read and write an SPI byte.
+unsigned char spitrans8(unsigned char byte);
+
+//! Read a block to a buffer.
+void spiflash_peekblock(unsigned long adr,
+			unsigned char *buf,
+			unsigned int len);
+
+
+//! Write many blocks to the SPI Flash.
+void spiflash_pokeblocks(unsigned long adr,
+			 unsigned char *buf,
+			 unsigned int len);
+
+
+//! Enable SPI writing
+void spiflash_wrten();
+
+//! Read and write an SPI byte.
+unsigned char spitrans8(unsigned char byte);
+//! Grab the SPI flash status byte.
+unsigned char spiflash_status();
+//! Erase a sector.
+void spiflash_erasesector(unsigned long adr);
+
+extern app_t const spi_app;
 
-#define SETMOSI P5OUT|=MOSI
-#define CLRMOSI P5OUT&=~MOSI
-#define SETCLK P5OUT|=SCK
-#define CLRCLK P5OUT&=~SCK
-#define READMISO (P5IN&MISO?1:0)
+#endif