X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Flib%2Fmsp430x1612.c;h=d577e502c680fa4f3bcd3e85ec4e10de1245e05f;hp=386119f48c8e4dd462b9341dfcb301345ef80a3d;hb=593dd80ba8c49c429e1f8d2d2185fa4ee47bda4d;hpb=d7ad826230d336ad7b7bd20e47dccc26d7ad456f diff --git a/firmware/lib/msp430x1612.c b/firmware/lib/msp430x1612.c index 386119f..d577e50 100644 --- a/firmware/lib/msp430x1612.c +++ b/firmware/lib/msp430x1612.c @@ -2,36 +2,40 @@ #include "platform.h" +#ifdef __MSPGCC__ +#include +#else #include #include #include +#endif //! Receive a byte. -unsigned char serial_rx(){ +unsigned char serial0_rx(){ char c; - + while(!(IFG1&URXIFG0));//wait for a byte c = RXBUF0; IFG1&=~URXIFG0; U0TCTL &= ~URXSE; - + return c; } //! Receive a byte. unsigned char serial1_rx(){ char c; - + while(!(IFG2&URXIFG1));//wait for a byte c = RXBUF1; IFG2&=~URXIFG1; U1TCTL &= ~URXSE; - + return c; } //! Transmit a byte. -void serial_tx(unsigned char x){ +void serial0_tx(unsigned char x){ while ((IFG1 & UTXIFG0) == 0); //loop until buffer is free TXBUF0 = x; } @@ -51,8 +55,8 @@ void serial1_tx(unsigned char x){ */ //! Set the baud rate. -void setbaud(unsigned char rate){ - +void setbaud0(unsigned char rate){ + //http://mspgcc.sourceforge.net/baudrate.html switch(rate){ case 1://9600 baud @@ -76,41 +80,39 @@ void setbaud(unsigned char rate){ //! Set the baud rate of the second uart. void setbaud1(unsigned char rate){ - //http://mspgcc.sourceforge.net/baudrate.html switch(rate){ case 1://9600 baud - // UBR01=0x7F; UBR11=0x01; UMCTL1=0x5B; /* uart0 3683400Hz 9599bps */ + UBR01=0x7F; UBR11=0x01; UMCTL1=0x5B; /* uart0 3683400Hz 9599bps */ break; case 2://19200 baud - //UBR01=0xBF; UBR11=0x00; UMCTL1=0xF7; /* uart0 3683400Hz 19194bps */ + UBR01=0xBF; UBR11=0x00; UMCTL1=0xF7; /* uart0 3683400Hz 19194bps */ break; case 3://38400 baud - //UBR01=0x5F; UBR11=0x00; UMCTL1=0xBF; /* uart0 3683400Hz 38408bps */ + UBR01=0x5F; UBR11=0x00; UMCTL1=0xBF; /* uart0 3683400Hz 38408bps */ break; case 4://57600 baud - //UBR01=0x40; UBR11=0x00; UMCTL1=0x00; /* uart0 3683400Hz 57553bps */ + UBR01=0x40; UBR11=0x00; UMCTL1=0x00; /* uart0 3683400Hz 57553bps */ break; default: case 5://115200 baud - //UBR01=0x20; UBR11=0x00; UMCTL1=0x00; /* uart0 3683400Hz 115106bps */ + UBR01=0x20; UBR11=0x00; UMCTL1=0x00; /* uart0 3683400Hz 115106bps */ break; } } -void msp430_init_uart(){ - +void msp430_init_uart0(){ /* RS232 */ - + P3SEL |= BIT4|BIT5; // P3.4,5 = USART0 TXD/RXD P3DIR |= BIT4; - + UCTL0 = SWRST | CHAR; /* 8-bit character, UART mode */ UTCTL0 = SSEL1; /* UCLK = MCLK */ - - setbaud(0); - + + setbaud0(0); + ME1 &= ~USPIE0; /* USART1 SPI module disable */ ME1 |= (UTXE0 | URXE0); /* Enable USART1 TXD/RXD */ @@ -118,12 +120,36 @@ void msp430_init_uart(){ /* XXX Clear pending interrupts before enable!!! */ U0TCTL |= URXSE; - - + + //IE1 |= URXIE1; /* Enable USART1 RX interrupt */ } +void msp430_init_uart1(){ + + /* RS232 */ + P3DIR &= ~0x80; /* Select P37 for input (UART1RX) */ + P3DIR |= 0x40; /* Select P36 for output (UART1TX) */ + P3SEL |= 0xC0; /* Select P36,P37 for UART1{TX,RX} */ + + UCTL1 = SWRST | CHAR; /* 8-bit character, UART mode */ + UTCTL1 = SSEL1; /* UCLK = MCLK */ + + setbaud1(0); + + ME2 &= ~USPIE1; /* USART1 SPI module disable */ + ME2 |= (UTXE1 | URXE1); /* Enable USART1 TXD/RXD */ + + UCTL1 &= ~SWRST; + + /* XXX Clear pending interrupts before enable!!! */ + U1TCTL |= URXSE; + + //IE2 |= URXIE1; /* Enable USART1 RX interrupt */ +} + + /** For EZ430/FETUIF void msp430_init_dco() { WDTCTL = WDTPW + WDTHOLD; //stop WDT @@ -142,6 +168,13 @@ void msp430_init_uart(){ } */ + +//! Initialization is correct. +void msp430_init_dco_done(){ + //Nothing to do for the 1612. +} + + void msp430_init_dco() { /* This code taken from the FU Berlin sources and reformatted. */ // @@ -153,17 +186,17 @@ void msp430_init_dco() { //#define MSP430_CPU_SPEED 4915200UL //Max speed. -//#deefine MSP430_CPU_SPEED 4500000UL +//#define MSP430_CPU_SPEED 4500000UL //baud rate speed #define MSP430_CPU_SPEED 3683400UL #define DELTA ((MSP430_CPU_SPEED) / (32768 / 8)) unsigned int compare, oldcapture = 0; unsigned int i; - + WDTCTL = WDTPW + WDTHOLD; //stop WDT - - + + DCOCTL=0xF0; //a4 //1100 @@ -171,12 +204,12 @@ void msp430_init_dco() { /* ACLK is devided by 4. RSEL=6 no division for MCLK and SSMCLK. XT2 is off. */ //BCSCTL1 = 0xa8; - + BCSCTL2 = 0x00; /* Init FLL to desired frequency using the 32762Hz crystal DCO frquenzy = 2,4576 MHz */ - - P1OUT|=1; - + + PLEDOUT|=PLEDPIN; + BCSCTL1 |= DIVA1 + DIVA0; /* ACLK = LFXT1CLK/8 */ for(i = 0xffff; i > 0; i--) { /* Delay for XTAL to settle */ asm("nop"); @@ -209,13 +242,13 @@ void msp430_init_dco() { /* -> Select next higher RSEL */ } } - + CCTL2 = 0; /* Stop CCR2 function */ TACTL = 0; /* Stop Timer_A */ BCSCTL1 &= ~(DIVA1 + DIVA0); /* remove /8 divisor from ACLK again */ - - P1OUT=0; + + PLEDOUT=~PLEDPIN; }