X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Flib%2Fmsp430x2618.c;h=6a224fc2f1a91cf7b98e7307a5e2bb72edccf17c;hp=ac17e0da24cd4b804a2d7b7cf613e59971247e57;hb=d5c3f195610aeb972f3160ab74ca886db78154d5;hpb=c5a56b2284ba0cd554cb44ed221eb91489607b9e diff --git a/firmware/lib/msp430x2618.c b/firmware/lib/msp430x2618.c index ac17e0d..6a224fc 100644 --- a/firmware/lib/msp430x2618.c +++ b/firmware/lib/msp430x2618.c @@ -1,7 +1,6 @@ //! MSP430F2618 clock and I/O definitions -// Ought to be portable to other 2xx chips. -// 2274 looks particularly appealing. +// Included by other 2xx ports, such as the 2274. #include "platform.h" @@ -49,23 +48,28 @@ void serial1_tx(unsigned char x){ //! Set the baud rate. void setbaud(unsigned char rate){ - //http://mspgcc.sourceforge.net/baudrate.html + //Table 15-4, page 481 of 2xx Family Guide switch(rate){ case 1://9600 baud - + UCA0BR1 = 0x06; + UCA0BR0 = 0x82; break; case 2://19200 baud - + UCA0BR1 = 0x03; + UCA0BR0 = 0x41; break; case 3://38400 baud - + UCA0BR1 = 0xa0; + UCA0BR0 = 0x01; break; case 4://57600 baud - + UCA0BR1 = 0x1d; + UCA0BR0 = 0x01; break; default: case 5://115200 baud - + UCA0BR0 = 0x8a; + UCA0BR1 = 0x00; break; } } @@ -79,7 +83,6 @@ void setbaud1(unsigned char rate){ break; case 2://19200 baud - break; case 3://38400 baud @@ -94,41 +97,56 @@ void setbaud1(unsigned char rate){ } } - - -//19200 -#define BAUD0EN 0x1b -#define BAUD1EN 0x00 - +#define BAUD0EN 0x41 +#define BAUD1EN 0x03 void msp430_init_uart(){ - // Serial on P3.4, P3.5 + // Serial on P3.4, P3.5 P3SEL |= BIT4 + BIT5; P3DIR |= BIT4; - //UCA0CTL1 |= UCSWRST; /* disable UART */ + //UCA0CTL1 |= UCSWRST; /* disable UART */ UCA0CTL0 = 0x00; - //UCA0CTL0 |= UCMSB ; - UCA0CTL1 |= UCSSEL_2; // SMCLK - UCA0BR0 = BAUD0EN; // 115200 - UCA0BR1 = BAUD1EN; - UCA0MCTL = 0; // Modulation UCBRSx = 5 - UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** + //UCA0CTL0 |= UCMSB ; + + UCA0CTL1 |= UCSSEL_2; // SMCLK + //UCA0BR0 = BAUD0EN; // 115200 + //UCA0BR1 = BAUD1EN; + setbaud(5);//default baud, 115200 - //Leave this commented! - //Interrupt is handled by target code, not by bootloader. - //IE2 |= UCA0RXIE; + UCA0MCTL = 0; // Modulation UCBRSx = 5 + UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** + + //Leave this commented! + //Interrupt is handled by target code, not by bootloader. + //IE2 |= UCA0RXIE; } -//external resistor -#define DCOR 1 +//! Initialize the MSP430 clock. void msp430_init_dco() { - BCSCTL1 = CALBC1_16MHZ; - DCOCTL = CALDCO_16MHZ; + if(CALBC1_16MHZ!=0xFF){ + //Info is intact, use it. + BCSCTL1 = CALBC1_16MHZ; + DCOCTL = CALDCO_16MHZ; + }else{ + //Info is missing, guess at a good value. + switch(*((int*)0xff0)){ + default: + case 0x6ff2: //f26f, the MSP430F2618 + DCOCTL = 0x00; + BCSCTL1 = 0x8f; //CALBC1_16MHZ at 0x10f9 + /** Observed DCOCTL values: + 2618: 7f, 97 + */ + DCOCTL = 0x83; //CALDCO_16MHZ at 0x10f8 + break; + } + } + return; }