X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=firmware%2Fplatforms%2Fgoodfet.h;h=14f9df823d423c2af9b91fe3d534e3ef43411c8c;hp=d421bd727c0699a38fbd5b8ebc3bdecb6972240f;hb=f4a366d95f96109559f0903611d7103c50cde3f7;hpb=854dba571fe62948dfb23a396be3299225fcbb05

diff --git a/firmware/platforms/goodfet.h b/firmware/platforms/goodfet.h
index d421bd7..14f9df8 100644
--- a/firmware/platforms/goodfet.h
+++ b/firmware/platforms/goodfet.h
@@ -3,10 +3,17 @@
   \brief Port descriptions for the GoodFET platform.
 */
 
-#include <signal.h>
-#include <io.h>
-#include <iomacros.h>
+/* #ifdef __MSPGCC__ */
+/* #include <msp430.h> */
+/* #else */
+/* #include <signal.h> */
+/* #include <msp430.h> */
+/* #include <iomacros.h> */
+/* #endif */
 
+#ifndef _GNU_ASSEMBLER_
+#include <msp430.h>
+#endif
 
 //LED on P1.0
 #define PLEDOUT P1OUT
@@ -14,7 +21,7 @@
 #define PLEDPIN BIT0
 
 //Use P3 instead of P5 for target I/O on chips without P5.
-#ifdef msp430x2274
+#ifdef msp430f2274
 //#warning "No P5, using P3 instead.  Will break 2618 and 1612 support."
 #define P5OUT P3OUT
 #define P5DIR P3DIR
@@ -44,10 +51,19 @@
 #define CLRSS P5OUT&=~BIT0
 #define DIRSS P5DIR|=BIT0;
 
-//BIT5 is Chip Enable.  Need to document this
-//#define RADIOACTIVE  P5OUT|=BIT5
-//#define RADIOPASSIVE P5OUT&=~BIT5
-#define SETCE P5OUT|=BIT5
-#define CLRCE P5OUT&=~BIT5
-#define DIRCE P5DIR|=BIT5
+//Used for the Nordic port, !RST pin on regular GoodFET.
+#define SETCE P2OUT|=BIT6
+#define CLRCE P2OUT&=~BIT6
+#define DIRCE P2DIR|=BIT6
+
+// network byte order converters
+#define htons(x) ((((uint16_t)(x) & 0xFF00) >> 8) | \
+				 (((uint16_t)(x) & 0x00FF) << 8))
+#define htonl(x) ((((uint32_t)(x) & 0xFF000000) >> 24) | \
+				  (((uint32_t)(x) & 0x00FF0000) >> 8) | \
+				  (((uint32_t)(x) & 0x0000FF00) << 8) | \
+				  (((uint32_t)(x) & 0x000000FF) << 24))
+
+#define ntohs htons
+#define ntohl htonl