X-Git-Url: http://git.rot13.org/?p=goodfet;a=blobdiff_plain;f=shellcode%2Fchipcon%2Fcc1110%2Freflexframe.c;h=28c2da161d2aaa31ad77c0211ba8628dbbdbe7f0;hp=1081c8d21943eb3a17134421c9cebed32f925258;hb=6b7c1890ea90e22ec2c75506b274e21c35fc8af9;hpb=f9fa242f4cd7c7ad6ff7f2a603d77e721595a7ac diff --git a/shellcode/chipcon/cc1110/reflexframe.c b/shellcode/chipcon/cc1110/reflexframe.c index 1081c8d..28c2da1 100644 --- a/shellcode/chipcon/cc1110/reflexframe.c +++ b/shellcode/chipcon/cc1110/reflexframe.c @@ -2,6 +2,26 @@ #include "cc1110-ext.h" char __xdata at 0xfe00 packet[256] ; + +char __xdata at 0xfdf0 cfg[5] ; +//! Save MDMCFG* +void save_settings(){ + cfg[0]=MDMCFG0; + cfg[1]=MDMCFG1; + cfg[2]=MDMCFG2; + cfg[3]=MDMCFG3; + cfg[4]=MDMCFG4; + +} +//! Restore MDMCFG* +void restore_settings(){ + MDMCFG0=cfg[0]; + MDMCFG1=cfg[1]; + MDMCFG2=cfg[2]; + MDMCFG3=cfg[3]; + MDMCFG4=cfg[4]; +} + void carrier(){ // Set the system clock source to HS XOSC and max CPU speed, // ref. [clk]=>[clk_xosc.c] @@ -16,54 +36,24 @@ void carrier(){ * used, except that "unmodulated" is chosen in the "Simple RX tab". This * results in an umodulated carrier with a frequency of approx. 2.433 GHz. */ - FSCTRL1 = 0x0A; // Frequency synthesizer control. - FSCTRL0 = 0x00; // Frequency synthesizer control. + //FSCTRL1 = 0x0A; // Frequency synthesizer control. + //FSCTRL0 = 0x00; // Frequency synthesizer control. - MDMCFG4 = 0x86; // Modem configuration. MDMCFG3 = 0x83; // Modem configuration. MDMCFG2 = 0x30; // Modem configuration. MDMCFG1 = 0x22; // Modem configuration. MDMCFG0 = 0xF8; // Modem configuration. - CHANNR = 0x00; // Channel number. - DEVIATN = 0x00; // Modem deviation setting (when FSK modulation is enabled). - FREND1 = 0x56; // Front end RX configuration. - FREND0 = 0x10; // Front end RX configuration. - MCSM0 = 0x14; // Main Radio Control State Machine configuration. - FOCCFG = 0x16; // Frequency Offset Compensation Configuration. - BSCFG = 0x6C; // Bit synchronization Configuration. - AGCCTRL2 = 0x03; // AGC control. - AGCCTRL1 = 0x40; // AGC control. - AGCCTRL0 = 0x91; // AGC control. - FSCAL3 = 0xE9; // Frequency synthesizer calibration. - FSCAL2 = 0x2a; // Frequency synthesizer calibration. - FSCAL1 = 0x00; // Frequency synthesizer calibration. - FSCAL0 = 0x1f; // Frequency synthesizer calibration - - TEST2 = 0x88; // Various test settings. - TEST1 = 0x31; // Various test settings. - TEST0 = 0x09; // Various test settings. - //FE is too high - PA_TABLE0 = 0xFF; // PA output power setting. - PKTCTRL1 = 0x04; // Packet automation control. - PKTCTRL0 = 0x22; // Packet automation control. - ADDR = 0x00; // Device address. - PKTLEN = 0xFF; // Packet length. - /* Settings not from SmartRF® Studio. Setting both sync word registers to * 0xAA = 0b10101010, i.e., the same as the preamble pattern. Not necessary, * but gives control of what the radio attempts to transmit. */ - SYNC1 = 0xAA; - SYNC0 = 0xAA; - - /* Put radio in TX. - RFST = RFST_STX; - while ((MARCSTATE & MARCSTATE_MARC_STATE) != MARC_STATE_TX); - */ - + + //These sync values are better for jamming, but they break reception. + //SYNC1 = 0xAA; + //SYNC0 = 0xAA; #define RFON RFST = RFST_SIDLE; RFST = RFST_STX; while ((MARCSTATE & MARCSTATE_MARC_STATE) != MARC_STATE_TX); #define RFOFF RFST = RFST_SIDLE; //while ((MARCSTATE & MARCSTATE_MARC_STATE) != MARC_STATE_IDLE); @@ -81,83 +71,101 @@ void sleepMillis(int ms) { }; } -//! Wait for a packet to come, then immediately return. -void rxwait(){ - int i=0; - - //Disable interrupts. - RFTXRXIE=0; - - //idle a bit. - RFST=RFST_SIDLE; - while(MARCSTATE!=MARC_STATE_IDLE); - - sleepMillis(10); - //Begin to receive. - RFST=RFST_SRX; - while(MARCSTATE!=MARC_STATE_RX); - //while(MARCSTATE!=MARC_STATE_RX_OVERFLOW); - - - - //Incoming! - /* - //Fixed length - packet[i++]=PKTLEN; - while(i