Clearing DCO per Andre@TI's advice.

This will prevent accidental clock crash on chips with BCL12 bug.

git-svn-id: https://svn.code.sf.net/p/goodfet/code/trunk@229 12e2690d-a6be-4b82-a7b7-67c4a43b65c8

diff --git a/firmware/lib/msp430x2618.c b/firmware/lib/msp430x2618.c
index 9409f56..814c8ef 100644 (file)
--- a/firmware/lib/msp430x2618.c
+++ b/firmware/lib/msp430x2618.c
@@ -128,7 +128,7 @@ void msp430_init_uart(){
 
 //! Initialize the MSP430 clock.
 void msp430_init_dco() {
-  if(CALBC1_16MHZ!=0xFF && CALDCO_16MHZ!=0xFF){
+  if(CALBC1_16MHZ!=0xFF){
     //Info is intact, use it.
     BCSCTL1 = CALBC1_16MHZ;
     DCOCTL = CALDCO_16MHZ;
@@ -137,6 +137,7 @@ void msp430_init_dco() {
     switch(*((int*)0xff0)){
     default:
     case 0x6ff2:        //f26f, the MSP430F2618
+      DCOCTL = 0x00;
       BCSCTL1 = 0x8f;   //CALBC1_16MHZ at 0x10f9
       DCOCTL = 0x7f;    //CALDCO_16MHZ at 0x10f8
       break;