Clear P2SEL to disable XIN on MSP430F2274.

git-svn-id: https://svn.code.sf.net/p/goodfet/code/trunk@568 12e2690d-a6be-4b82-a7b7-67c4a43b65c8

diff --git a/firmware/apps/jtag/jtag.c b/firmware/apps/jtag/jtag.c
index d9193e8..d0d2118 100644 (file)
--- a/firmware/apps/jtag/jtag.c
+++ b/firmware/apps/jtag/jtag.c
@@ -13,8 +13,10 @@
 void jtagsetup(){
   P5DIR|=MOSI+SCK+TMS;
   P5DIR&=~MISO;
+  /*
   P5OUT|=0xFFFF;
   P5OUT=0;
+  */
   P4DIR|=TST;
   P2DIR|=RST;
   msdelay(100);

diff --git a/firmware/include/gfports.h b/firmware/include/gfports.h
index 38757cd..90214fa 100644 (file)
--- a/firmware/include/gfports.h
+++ b/firmware/include/gfports.h
@@ -12,6 +12,7 @@
 
 // N.B., only asm-clean CPP definitions allowed.
 
+
 //Use P3 instead of P5 for target I/O on chips without P5.
 #ifndef __MSP430_HAS_PORT5__
 #ifndef __MSP430_HAS_PORT5_R__
@@ -20,10 +21,10 @@
 #define P5DIR P3DIR
 #define P5REN P3REN
 #define P5IN P3IN
-
 #endif
 #endif
 
+
 //Use false P5REN for 1612.
 #ifdef __MSP430_HAS_PORT5__
 #ifndef __MSP430_HAS_PORT5_R__
@@ -32,6 +33,7 @@
 #endif
 #endif
 
+/*
 //Use these instead of the explicit names.
 #ifdef MSP430
 #define gfout P5OUT
@@ -39,7 +41,7 @@
 #define gfdir P5DIR
 #define gfren P5REN
 #endif
-
+*/
 
 
 #endif //GFPORTS

diff --git a/firmware/lib/msp430x2618.c b/firmware/lib/msp430x2618.c
index 426106d..8b72683 100644 (file)
--- a/firmware/lib/msp430x2618.c
+++ b/firmware/lib/msp430x2618.c
@@ -120,10 +120,17 @@ void msp430_init_dco_done(){
 void msp430_init_dco() {
   int i=1000;
   char *choice=(char *) 0x200; //First word of RAM.
+  
   #ifdef __MSP430_HAS_PORT8__
   P8SEL = 0; // disable XT2 on P8.7/8
   #endif
   
+  //Set P2.6 mode for MSP430F2274
+  #ifndef __MSP430_HAS_PORT5__
+  P2SEL = 0; //disable XIN on 2274
+  #endif
+  
+  
   if(CALBC1_16MHZ!=0xFF){
     //Info is intact, use it.
     BCSCTL1 = CALBC1_16MHZ;
@@ -146,6 +153,8 @@ void msp430_init_dco() {
   //Minor delay.
   while(i--);
   
+  
+  
   return;
 }