still working

git-svn-id: https://svn.code.sf.net/p/goodfet/code/trunk@437 12e2690d-a6be-4b82-a7b7-67c4a43b65c8

diff --git a/client/GoodFETARM.py b/client/GoodFETARM.py
index 67b4a3a..9991d55 100644 (file)
--- a/client/GoodFETARM.py
+++ b/client/GoodFETARM.py
@@ -1,7 +1,6 @@
 #!/usr/bin/env python
 # GoodFET Client Library
 # 
 #!/usr/bin/env python
 # GoodFET Client Library
 # 

-# (C) 2009 Matthew Carpenter <matt at inguardians.com>

 #
 # Good luck with alpha / beta code.
 # Contributions and bug reports welcome.
 #
 # Good luck with alpha / beta code.
 # Contributions and bug reports welcome.

diff --git a/firmware/apps/jtag/jtagarm7tdmi.c b/firmware/apps/jtag/jtagarm7tdmi.c
index 1173c9b..0bf811c 100644 (file)
--- a/firmware/apps/jtag/jtagarm7tdmi.c
+++ b/firmware/apps/jtag/jtagarm7tdmi.c
@@ -1,5 +1,4 @@
 /*! \file jtagarm7tdmi.c
 /*! \file jtagarm7tdmi.c

-  \author Matthew Carpenter <matt@inguardians.com>

   \brief ARM7TDMI JTAG (AT91R40008)
 */
 
   \brief ARM7TDMI JTAG (AT91R40008)
 */
 


@@ -139,7 +138,7 @@ unsigned long jtagarm7tdmi_start() {
   /*
   P5DIR &=~RST;
   */
   /*
   P5DIR &=~RST;
   */

-  delay(0xFF);
+  delay(0xF);

   jtagarm7tdmi_resettap();
   return jtagarm7tdmi_idcode();
 }
   jtagarm7tdmi_resettap();
   return jtagarm7tdmi_idcode();
 }


@@ -278,27 +277,27 @@ unsigned char jtagarm7tdmi_restart() {
 }
 
 //!  ARM7TDMI_IR_CLAMP               0x5
 }
 
 //!  ARM7TDMI_IR_CLAMP               0x5

-unsigned long jtagarm7tdmi_clamp() { 
-  jtagarm7tdmi_resettap();
-  SHIFT_IR;
-  jtagarmtransn(ARM7TDMI_IR_CLAMP, 4, LSB, END, NORETIDLE);
-  SHIFT_DR;
-  return jtagarmtransn(0, 32, LSB, END, RETIDLE);
-}
+//unsigned long jtagarm7tdmi_clamp() { 
+//  jtagarm7tdmi_resettap();
+//  SHIFT_IR;
+//  jtagarmtransn(ARM7TDMI_IR_CLAMP, 4, LSB, END, NORETIDLE);
+//  SHIFT_DR;
+//  return jtagarmtransn(0, 32, LSB, END, RETIDLE);
+//}

 
 //!  ARM7TDMI_IR_HIGHZ               0x7
 
 //!  ARM7TDMI_IR_HIGHZ               0x7

-unsigned char jtagarm7tdmi_highz() { 
-  jtagarm7tdmi_resettap();
-  SHIFT_IR;
-  return jtagarmtransn(ARM7TDMI_IR_HIGHZ, 4, LSB, END, NORETIDLE);
-}
+//unsigned char jtagarm7tdmi_highz() { 
+//  jtagarm7tdmi_resettap();
+//  SHIFT_IR;
+//  return jtagarmtransn(ARM7TDMI_IR_HIGHZ, 4, LSB, END, NORETIDLE);
+//}

 
 //! define ARM7TDMI_IR_CLAMPZ              0x9
 
 //! define ARM7TDMI_IR_CLAMPZ              0x9

-unsigned char jtagarm7tdmi_clampz() { 
-  jtagarm7tdmi_resettap();
-  SHIFT_IR;
-  return jtagarmtransn(ARM7TDMI_IR_CLAMPZ, 4, LSB, END, NORETIDLE);
-}
+//unsigned char jtagarm7tdmi_clampz() { 
+//  jtagarm7tdmi_resettap();
+//  SHIFT_IR;
+//  return jtagarmtransn(ARM7TDMI_IR_CLAMPZ, 4, LSB, END, NORETIDLE);
+//}

 
 
 //!  Connect the appropriate scan chain to TDO/TDI.  SCAN_N, INTEST, ENDS IN SHIFT_DR!!!!!
 
 
 //!  Connect the appropriate scan chain to TDO/TDI.  SCAN_N, INTEST, ENDS IN SHIFT_DR!!!!!


@@ -459,18 +458,12 @@ void jtagarm7tdmi_set_watchpoint0(unsigned long addr, unsigned long addrmask, un
   // store watchpoint info?  - not right now
     // FIXME: store info
 
   // store watchpoint info?  - not right now
     // FIXME: store info
 

-  // write 0 in watchpoint 0 address
-  eice_write(EICE_WP0ADDR, addr);
-  // write 0xffffffff in watchpoint 0 address mask
-  eice_write(EICE_WP0ADDRMASK, addrmask);
-  // write 0 in watchpoint 0 data
-  eice_write(EICE_WP0DATA, data);
-  // write 0xffffffff in watchpoint 0 data mask
-  eice_write(EICE_WP0DATAMASK, datamask);
-  // write 0x00000100 in watchpoint 0 control value register (enables watchpoint)
-  eice_write(EICE_WP0CTRL, ctrlmask);
-  // write 0xfffffff7 in watchpoint 0 control mask - only detect the fetch instruction
-  eice_write(EICE_WP0CTRLMASK, ctrlmask);
+  eice_write(EICE_WP0ADDR, addr);           // write 0 in watchpoint 0 address
+  eice_write(EICE_WP0ADDRMASK, addrmask);   // write 0xffffffff in watchpoint 0 address mask
+  eice_write(EICE_WP0DATA, data);           // write 0 in watchpoint 0 data
+  eice_write(EICE_WP0DATAMASK, datamask);   // write 0xffffffff in watchpoint 0 data mask
+  eice_write(EICE_WP0CTRL, ctrlmask);       // write 0x00000100 in watchpoint 0 control value register (enables watchpoint)
+  eice_write(EICE_WP0CTRLMASK, ctrlmask);   // write 0xfffffff7 in watchpoint 0 control mask - only detect the fetch instruction

 }
 
 //!  Set and Enable Watchpoint 1
 }
 
 //!  Set and Enable Watchpoint 1


@@ -478,30 +471,22 @@ void jtagarm7tdmi_set_watchpoint1(unsigned long addr, unsigned long addrmask, un
   // store watchpoint info?  - not right now
     // FIXME: store info
 
   // store watchpoint info?  - not right now
     // FIXME: store info
 

-  // write 0 in watchpoint 1 address
-  eice_write(EICE_WP1ADDR, addr);
-  // write 0xffffffff in watchpoint 1 address mask
-  eice_write(EICE_WP1ADDRMASK, addrmask);
-  // write 0 in watchpoint 1 data
-  eice_write(EICE_WP1DATA, data);
-  // write 0xffffffff in watchpoint 1 data mask
-  eice_write(EICE_WP1DATAMASK, datamask);
-  // write 0x00000100 in watchpoint 1 control value register (enables watchpoint)
-  eice_write(EICE_WP1CTRL, ctrl);
-  // write 0xfffffff7 in watchpoint 1 control mask - only detect the fetch instruction
-  eice_write(EICE_WP1CTRLMASK, ctrlmask);
+  eice_write(EICE_WP1ADDR, addr);           // write 0 in watchpoint 1 address
+  eice_write(EICE_WP1ADDRMASK, addrmask);   // write 0xffffffff in watchpoint 1 address mask
+  eice_write(EICE_WP1DATA, data);           // write 0 in watchpoint 1 data
+  eice_write(EICE_WP1DATAMASK, datamask);   // write 0xffffffff in watchpoint 1 data mask
+  eice_write(EICE_WP1CTRL, ctrl);           // write 0x00000100 in watchpoint 1 control value register (enables watchpoint)
+  eice_write(EICE_WP1CTRLMASK, ctrlmask);   // write 0xfffffff7 in watchpoint 1 control mask - only detect the fetch instruction

 }
 
 //!  Disable Watchpoint 0
 void jtagarm7tdmi_disable_watchpoint0(){
 }
 
 //!  Disable Watchpoint 0
 void jtagarm7tdmi_disable_watchpoint0(){

-  // write 0 in watchpoint 0 control value - disables watchpoint 0
-  eice_write(EICE_WP0CTRL, 0x0);
+  eice_write(EICE_WP0CTRL, 0x0); // write 0 in watchpoint 0 control value - disables watchpoint 0

 }
   
 //!  Disable Watchpoint 1
 void jtagarm7tdmi_disable_watchpoint1(){
 }
   
 //!  Disable Watchpoint 1
 void jtagarm7tdmi_disable_watchpoint1(){

-  // write 0 in watchpoint 0 control value - disables watchpoint 0
-  eice_write(EICE_WP1CTRL, 0x0);
+  eice_write(EICE_WP1CTRL, 0x0);            // write 0 in watchpoint 0 control value - disables watchpoint 0

 }
 
 
 }
 
 


@@ -514,12 +499,10 @@ unsigned long test_exec(unsigned long instr, unsigned long parameter, unsigned c
 
   cmddatalong[1] = jtagarm7tdmi_nop( 0);
   cmddatalong[2] = jtagarm7tdmi_nop(systemspeed);
 
   cmddatalong[1] = jtagarm7tdmi_nop( 0);
   cmddatalong[2] = jtagarm7tdmi_nop(systemspeed);

-  // write 32-bit instruction code into DR
-  cmddatalong[3] = jtagarm7tdmi_instr_primitive(instr, 0);
+  cmddatalong[3] = jtagarm7tdmi_instr_primitive(instr, 0);      // write 32-bit instruction code into DR

   cmddatalong[4] = jtagarm7tdmi_nop( 0);
   cmddatalong[5] = jtagarm7tdmi_nop( 0);
   cmddatalong[4] = jtagarm7tdmi_nop( 0);
   cmddatalong[5] = jtagarm7tdmi_nop( 0);

-  // inject long
-  cmddatalong[6] = jtagarm7tdmi_instr_primitive(parameter, 0);
+  cmddatalong[6] = jtagarm7tdmi_instr_primitive(parameter, 0);  // inject long

   cmddatalong[7] = jtagarm7tdmi_nop( 0);
   cmddatalong[8] = jtagarm7tdmi_nop( 0);
   cmddatalong[9] = jtagarm7tdmi_nop( 0);
   cmddatalong[7] = jtagarm7tdmi_nop( 0);
   cmddatalong[8] = jtagarm7tdmi_nop( 0);
   cmddatalong[9] = jtagarm7tdmi_nop( 0);


@@ -536,12 +519,10 @@ unsigned long jtagarm7tdmi_exec(unsigned long instr, unsigned long parameter, un
 
   cmddatalong[1] = jtagarm7tdmi_nop( 0);
   cmddatalong[2] = jtagarm7tdmi_nop(systemspeed);
 
   cmddatalong[1] = jtagarm7tdmi_nop( 0);
   cmddatalong[2] = jtagarm7tdmi_nop(systemspeed);

-  // write 32-bit instruction code into DR
-  cmddatalong[3] = jtagarm7tdmi_instr_primitive(instr, 0);
+  cmddatalong[3] = jtagarm7tdmi_instr_primitive(instr, 0);      // write 32-bit instruction code into DR

   cmddatalong[4] = jtagarm7tdmi_nop( 0);
   cmddatalong[5] = jtagarm7tdmi_nop( 0);
   cmddatalong[4] = jtagarm7tdmi_nop( 0);
   cmddatalong[5] = jtagarm7tdmi_nop( 0);

-  // inject long
-  cmddatalong[6] = jtagarm7tdmi_instr_primitive(parameter, 0);
+  cmddatalong[6] = jtagarm7tdmi_instr_primitive(parameter, 0);  // inject long

   cmddatalong[7] = jtagarm7tdmi_nop( 0);
   retval = jtagarm7tdmi_nop( 0);
   cmddatalong[9] = jtagarm7tdmi_nop( 0);
   cmddatalong[7] = jtagarm7tdmi_nop( 0);
   retval = jtagarm7tdmi_nop( 0);
   cmddatalong[9] = jtagarm7tdmi_nop( 0);


@@ -556,12 +537,12 @@ unsigned long jtagarm7tdmi_get_register(unsigned char reg) {
   // push nop into pipeline - clean out the pipeline...
   cmddatalong[2] = jtagarm7tdmi_nop( 0);
 
   // push nop into pipeline - clean out the pipeline...
   cmddatalong[2] = jtagarm7tdmi_nop( 0);
 

-  instr = ARM_READ_REG | (reg<<12);      // push STR Rx, [R14] into pipeline
+  instr = ARM_READ_REG | (reg<<12);                     // push STR Rx, [R14] into pipeline

   cmddatalong[1] = jtagarm7tdmi_instr_primitive(instr, 0);
   cmddatalong[1] = jtagarm7tdmi_instr_primitive(instr, 0);

-  cmddatalong[2] = jtagarm7tdmi_nop( 0); // push nop into pipeline - fetched
-  cmddatalong[3] = jtagarm7tdmi_nop( 0); // push nop into pipeline - decoded
-  cmddatalong[4] = jtagarm7tdmi_nop( 0); // push nop into pipeline - executed 
-  retval = jtagarm7tdmi_nop( 0);         // recover 32-bit word
+  cmddatalong[2] = jtagarm7tdmi_nop( 0);                // push nop into pipeline - fetched
+  cmddatalong[3] = jtagarm7tdmi_nop( 0);                // push nop into pipeline - decoded
+  cmddatalong[4] = jtagarm7tdmi_nop( 0);                // push nop into pipeline - executed 
+  retval = jtagarm7tdmi_nop( 0);                        // recover 32-bit word

   cmddatalong[5] = retval;
   cmddatalong[6] = jtagarm7tdmi_nop( 0);
   cmddatalong[7] = jtagarm7tdmi_nop( 0);
   cmddatalong[5] = retval;
   cmddatalong[6] = jtagarm7tdmi_nop( 0);
   cmddatalong[7] = jtagarm7tdmi_nop( 0);

diff --git a/firmware/include/jtagarm7tdmi.h b/firmware/include/jtagarm7tdmi.h
index 639f969..9dd5f14 100644 (file)
--- a/firmware/include/jtagarm7tdmi.h
+++ b/firmware/include/jtagarm7tdmi.h
@@ -1,5 +1,4 @@
 /*! \file jtagarm7tdmi.h
 /*! \file jtagarm7tdmi.h

-  \author Matthew Carpenter <matt@inguardians.com>

   \brief JTAG handler functions for the ARM7TDMI family of processors
 */
 
   \brief JTAG handler functions for the ARM7TDMI family of processors
 */
 


@@ -184,8 +183,8 @@ The least significant bit of the instruction register is scanned in and scanned
 #define ARM_INSTR_STM_R0_r0_r15     0x 
 #define ARM_INSTR_STMIA_R14_r0_rx   0xE88E0000      // add up to 65k to indicate which registers...
 //   #define ARM_INSTR_STMIA_R14_r0_rx   0x00008ee8      // add up to 65k to indicate which registers...
 #define ARM_INSTR_STM_R0_r0_r15     0x 
 #define ARM_INSTR_STMIA_R14_r0_rx   0xE88E0000      // add up to 65k to indicate which registers...
 //   #define ARM_INSTR_STMIA_R14_r0_rx   0x00008ee8      // add up to 65k to indicate which registers...

-#define ARM_INSTR_SKANKREGS         0xE88Effff      // add up to 65k to indicate which registers...

 #define ARM_STORE_MULTIPLE          ARM_INSTR_STMIA_R14_r0-rx
 #define ARM_STORE_MULTIPLE          ARM_INSTR_STMIA_R14_r0-rx

+#define ARM_INSTR_SKANKREGS         0xE88Effff      // add up to 65k to indicate which registers...

 
 #define ARM_INSTR_B_PC              0xea000000
 #define ARM_INSTR_BX_PC             0xe1200010      // need to set r0 to the desired address
 
 #define ARM_INSTR_B_PC              0xea000000
 #define ARM_INSTR_BX_PC             0xe1200010      // need to set r0 to the desired address