changed app number to 0x13
git-svn-id: https://svn.code.sf.net/p/goodfet/code/trunk@525
12e2690d-a6be-4b82-a7b7-
67c4a43b65c8
- \brief ARM7TDMI JTAG (AT91R40008)
+ \brief ARM7TDMI JTAG (AT91R40008, AT91SAM7xxx)
}
void jtag_arm_tcktock() {
}
void jtag_arm_tcktock() {
+ delay(100); // FIXME: Should never wait this long...
CLRTCK;
PLEDOUT^=PLEDPIN;
CLRTCK;
PLEDOUT^=PLEDPIN;
+ delay(100); // FIXME: Should never wait this long...
SETTCK;
PLEDOUT^=PLEDPIN;
}
SETTCK;
PLEDOUT^=PLEDPIN;
}
// ! Start JTAG, setup pins, reset TAP and return IDCODE
unsigned long jtagarm7tdmi_start() {
jtagsetup();
// ! Start JTAG, setup pins, reset TAP and return IDCODE
unsigned long jtagarm7tdmi_start() {
jtagsetup();
- //Known-good starting position.
- //Might be unnecessary.
- //SETTST;
- //SETRST;
-
- //delay(0x2);
-
- //CLRRST;
- //delay(2);
- //CLRTST;
-
- //msdelay(10);
- //SETRST;
- /*
- P5DIR &=~RST;
- */
- //delay(0x2);
jtagarm7tdmi_resettap();
return jtagarm7tdmi_idcode();
}
jtagarm7tdmi_resettap();
return jtagarm7tdmi_idcode();
}
unsigned long high = 1;
unsigned long mask;
unsigned long high = 1;
unsigned long mask;
- for (bit=(bitcount-1)/8; bit>0; bit--)
- high <<= 8;
- high <<= ((bitcount-1)%8);
+ //for (bit=(bitcount-1)/8; bit>0; bit--)
+ // high <<= 8;
+ //high <<= ((bitcount-1)%8);
+ high <<= (bitcount-1);
*/
unsigned long retval;
if (current_chain != chain) {
*/
unsigned long retval;
if (current_chain != chain) {
- debugstr("===change chains===");
+ //debugstr("===change chains===");
SHIFT_IR;
jtagarmtransn(ARM7TDMI_IR_SCAN_N, 4, LSB, END, NORETIDLE);
SHIFT_DR;
retval = jtagarmtransn(chain, 4, LSB, END, NORETIDLE);
current_chain = chain;
} else
SHIFT_IR;
jtagarmtransn(ARM7TDMI_IR_SCAN_N, 4, LSB, END, NORETIDLE);
SHIFT_DR;
retval = jtagarmtransn(chain, 4, LSB, END, NORETIDLE);
current_chain = chain;
} else
- debugstr("===NOT change chains===");
+ //debugstr("===NOT change chains===");
retval = current_chain;
// put in test mode...
SHIFT_IR;
retval = current_chain;
// put in test mode...
SHIFT_IR;
//! Retrieve a 32-bit Register value
unsigned long jtagarm7tdmi_get_register(unsigned long reg) {
//! Retrieve a 32-bit Register value
unsigned long jtagarm7tdmi_get_register(unsigned long reg) {
- unsigned long retval = 0, instr;
+ unsigned long retval = 0, instr, reg2;
+ reg2 = (reg&0xf);
// push nop into pipeline - clean out the pipeline...
instr = (unsigned long)(reg<<12) | (unsigned long)ARM_READ_REG; // STR Rx, [R14]
// push nop into pipeline - clean out the pipeline...
instr = (unsigned long)(reg<<12) | (unsigned long)ARM_READ_REG; // STR Rx, [R14]
+ instr |= (unsigned long)((unsigned long)reg2<<8)<<8;
//instr = (unsigned long)(((unsigned long)reg<<12) | ARM_READ_REG);
//debugstr("Reading:");
//instr = (unsigned long)(((unsigned long)reg<<12) | ARM_READ_REG);
//debugstr("Reading:");
+ jtagarm7tdmi_nop( 0);
+ jtagarm7tdmi_nop( 0);
jtagarm7tdmi_nop( 0);
jtagarm7tdmi_instr_primitive(instr, 0);
jtagarm7tdmi_nop( 0); // push nop into pipeline - fetched
jtagarm7tdmi_nop( 0);
jtagarm7tdmi_instr_primitive(instr, 0);
jtagarm7tdmi_nop( 0); // push nop into pipeline - fetched
//! Set a 32-bit Register value
void jtagarm7tdmi_set_register(unsigned long reg, unsigned long val) {
//! Set a 32-bit Register value
void jtagarm7tdmi_set_register(unsigned long reg, unsigned long val) {
+ unsigned long instr, reg2;
+ reg2 = (reg&0xf);
instr = (unsigned long)(((unsigned long)reg<<12) | ARM_WRITE_REG); // LDR Rx, [R14]
instr = (unsigned long)(((unsigned long)reg<<12) | ARM_WRITE_REG); // LDR Rx, [R14]
+ instr |= (unsigned long)((unsigned long)reg2<<8)<<8;
+ //instr |= (unsigned long)((((unsigned long)reg)&0x7)<<8)<<8;
+ //debugstr("Writing:");
debughex32(instr);
//debughex32(val);
jtagarm7tdmi_nop( 0); // push nop into pipeline - clean out the pipeline...
debughex32(instr);
//debughex32(val);
jtagarm7tdmi_nop( 0); // push nop into pipeline - clean out the pipeline...
+ jtagarm7tdmi_nop( 0); // push nop into pipeline - clean out the pipeline...
jtagarm7tdmi_instr_primitive(instr, 0); // push instr into pipeline - fetch
jtagarm7tdmi_nop( 0); // push nop into pipeline - decode
jtagarm7tdmi_instr_primitive(instr, 0); // push instr into pipeline - fetch
jtagarm7tdmi_nop( 0); // push nop into pipeline - decode
- jtagarm7tdmi_nop( 0); // push nop into pipeline - execute
+ //jtagarm7tdmi_nop( 0); // push nop into pipeline - execute
- //debughex32(jtagarm7tdmi_instr_primitive(val, 0)); // push 32-bit word on data bus
+ jtagarm7tdmi_instr_primitive(val, 0); // push 32-bit word on data bus
jtagarm7tdmi_instr_primitive(val, 0); // push 32-bit word on data bus
jtagarm7tdmi_instr_primitive(val, 0); // push 32-bit word on data bus
jtagarm7tdmi_nop( 0); // push nop into pipeline - executed
jtagarm7tdmi_instr_primitive(val, 0); // push 32-bit word on data bus
jtagarm7tdmi_instr_primitive(val, 0); // push 32-bit word on data bus
jtagarm7tdmi_nop( 0); // push nop into pipeline - executed
+ jtagarm7tdmi_nop( 0); // push nop into pipeline - executed
- //if (reg == ARM_REG_PC){
+ if (reg == ARM_REG_PC){
jtagarm7tdmi_nop( 0);
jtagarm7tdmi_nop( 0);
jtagarm7tdmi_nop( 0);
jtagarm7tdmi_nop( 0);
//! Get all registers, placing them into cmddatalong[0-15]
void jtagarm7tdmi_get_registers() {
//! Get all registers, placing them into cmddatalong[0-15]
void jtagarm7tdmi_get_registers() {
+ debugstr("First 8 registers:");
+ debugstr(" Instr and the first few pops from the instruction chain:");
debughex32(ARM_INSTR_SKANKREGS1);
debughex32(jtagarm7tdmi_nop( 0));
debughex32(jtagarm7tdmi_instr_primitive(ARM_INSTR_SKANKREGS1,0));
debughex32(ARM_INSTR_SKANKREGS1);
debughex32(jtagarm7tdmi_nop( 0));
debughex32(jtagarm7tdmi_instr_primitive(ARM_INSTR_SKANKREGS1,0));
cmddatalong[ 5] = jtagarm7tdmi_nop( 0);
cmddatalong[ 6] = jtagarm7tdmi_nop( 0);
cmddatalong[ 7] = jtagarm7tdmi_nop( 0);
cmddatalong[ 5] = jtagarm7tdmi_nop( 0);
cmddatalong[ 6] = jtagarm7tdmi_nop( 0);
cmddatalong[ 7] = jtagarm7tdmi_nop( 0);
+
+ debugstr("Last 8 registers:");
+ debugstr(" Instr and the first few pops from the instruction chain:");
debughex32(ARM_INSTR_SKANKREGS2);
debughex32(jtagarm7tdmi_nop( 0));
//jtagarm7tdmi_nop( 0);
debughex32(ARM_INSTR_SKANKREGS2);
debughex32(jtagarm7tdmi_nop( 0));
//jtagarm7tdmi_nop( 0);
jtagarm7tdmi_resettap();
val = cmddata[0];
cmddatalong[0] = jtagarm7tdmi_get_register(val);
jtagarm7tdmi_resettap();
val = cmddata[0];
cmddatalong[0] = jtagarm7tdmi_get_register(val);
+ //debughex32(cmddatalong[0]);
txdata(app,verb,4);
break;
case JTAGARM7TDMI_SET_REGISTER: // FIXME: NOT AT ALL CORRECT, THIS IS TESTING CODE ONLY
jtagarm7tdmi_resettap();
txdata(app,verb,4);
break;
case JTAGARM7TDMI_SET_REGISTER: // FIXME: NOT AT ALL CORRECT, THIS IS TESTING CODE ONLY
jtagarm7tdmi_resettap();
+ debughex32(cmddatalong[1]);
jtagarm7tdmi_set_register(cmddata[0], cmddatalong[1]);
cmddatalong[0] = cmddatalong[1];
txdata(app,verb,4);
jtagarm7tdmi_set_register(cmddata[0], cmddatalong[1]);
cmddatalong[0] = cmddatalong[1];
txdata(app,verb,4);
#define CHIPCON 0x30
#define SIF 0x31
#define AVR 0x32
#define CHIPCON 0x30
#define SIF 0x31
#define AVR 0x32
-#define JTAGARM7TDMI 0x33 //Move this to 0x13
+#define JTAGARM7TDMI 0x13 //Move this to 0x13
#define PIC 0x34
//Radio peripherals are in the 0x50 range.
#define PIC 0x34
//Radio peripherals are in the 0x50 range.
// http://www.atmel.com/dyn/resources/prod_documents/DDI0029G_7TDMI_R3_trm.pdf
#define EXECNOPARM 0xe1a00000L
#define ARM_INSTR_NOP 0xe1a00000L
// http://www.atmel.com/dyn/resources/prod_documents/DDI0029G_7TDMI_R3_trm.pdf
#define EXECNOPARM 0xe1a00000L
#define ARM_INSTR_NOP 0xe1a00000L
-#define ARM_INSTR_STR_Rx_r14 0xe58e0000L
+//#define ARM_INSTR_STR_Rx_r14 0xe58e0000L // from atmel docs
+#define ARM_INSTR_STR_Rx_r14 0xe5800000L // set both src and dest reg in code
#define ARM_READ_REG ARM_INSTR_STR_Rx_r14
#define ARM_READ_REG ARM_INSTR_STR_Rx_r14
-#define ARM_INSTR_LDR_Rx_r14 0xe59e0000L
+//#define ARM_INSTR_LDR_Rx_r14 0xe59e0000L // from atmel docs
+#define ARM_INSTR_LDR_Rx_r14 0xe5900000L // set both src and dest reg in code
#define ARM_WRITE_REG ARM_INSTR_LDR_Rx_r14
#define ARM_INSTR_LDR_R1_r0_4 0xe4901004L
#define ARM_READ_MEM ARM_INSTR_LDR_R1_r0_4
#define ARM_WRITE_REG ARM_INSTR_LDR_Rx_r14
#define ARM_INSTR_LDR_R1_r0_4 0xe4901004L
#define ARM_READ_MEM ARM_INSTR_LDR_R1_r0_4