//! Receive a byte.
unsigned char serial1_rx(){
- //TODO
- return 00;
+ char c;
+
+ while (!(UC1IFG&UCA1RXIFG)); // USCI_A1 TX buffer ready?
+ c = UCA1RXBUF;
+ UC1IFG&=~UCA1RXIFG;
+
+ return c;
}
//! Transmit a byte.
UCA0TXBUF = x; /* send the character */
while(!(IFG2 & UCA0TXIFG));
}
+//! Transmit a byte on the second UART.
+void serial1_tx(unsigned char x){
+ while ((UC1IFG & UCA1TXIFG) == 0); //loop until buffer is free
+ UCA1TXBUF = x; /* send the character */
+ while(!(UC1IFG & UCA1TXIFG));
+}
+
//! Transmit a byte.
void serial_tx_old(unsigned char x){
while ((IFG2 & UCA0TXIFG) == 0); //loop until buffer is free
while(!(IFG2 & UCA0TXIFG));
}
-//! Transmit a byte on the second UART.
-void serial1_tx(unsigned char x){
-
-}
//! Set the baud rate.
void setbaud0(unsigned char rate){
//! Set the baud rate of the second uart.
void setbaud1(unsigned char rate){
-
+ //Table 15-4, page 481 of 2xx Family Guide
+ switch(rate){
+ case 1://9600 baud
+ UCA1BR1 = 0x06;
+ UCA1BR0 = 0x82;
+ break;
+ case 2://19200 baud
+ UCA1BR1 = 0x03;
+ UCA1BR0 = 0x41;
+ break;
+ case 3://38400 baud
+ UCA1BR1 = 0xa0;
+ UCA1BR0 = 0x01;
+ break;
+ case 4://57600 baud
+ UCA1BR1 = 0x1d;
+ UCA1BR0 = 0x01;
+ break;
+ default:
+ case 5://115200 baud
+ UCA1BR0 = 0x8a;
+ UCA1BR1 = 0x00;
+ break;
+ }
}
#define BAUD0EN 0x41
void msp430_init_uart(){
- // Serial on P3.4, P3.5
+ // Serial0 on P3.4, P3.5
P3SEL |= BIT4 + BIT5;
P3DIR |= BIT4;
//Leave this commented!
//Interrupt is handled by target code, not by bootloader.
- //IE2 |= UCA0RXIE;
+ //IE2 |= UCA0RXIE; //DO NOT UNCOMMENT
+
+ // Serial 1 on P3.6, 3.7
+ P3SEL |= 0xC0;
+ //UCA1CTL0 = 0x00;
+ UCA1CTL1 |= UCSSEL_2; // SMCLK
+ setbaud1(5); //115200
+ UCA1MCTL = 0;
+ UCA1CTL1 &= ~UCSWRST; // Initialize USCI state machine
+
}
--- /dev/null
+/*! \file apimote.h\r
+ \author Ryan Speers\r
+ \brief Port descriptions for the GoodFET platform.\r
+*/\r
+\r
+/* #ifdef __MSPGCC__ */\r
+/* #include <msp430.h> */\r
+/* #else */\r
+/* #include <signal.h> */\r
+/* #include <msp430.h> */\r
+/* #include <iomacros.h> */\r
+/* #endif */\r
+\r
+#ifndef _GNU_ASSEMBLER_\r
+#include <msp430.h>\r
+#endif\r
+\r
+//LED on P5.5 (pin 49) (LED1 red)\r
+#define PLEDOUT P5OUT\r
+#define PLEDDIR P5DIR\r
+#define PLEDPIN BIT5\r
+//LED on P5.6 (pin 50) (LED2 green)\r
+#define PLED2OUT P5OUT\r
+#define PLED2DIR P5DIR\r
+#define PLED2PIN BIT6\r
+//LED on P5.7 (pin 51) (LED3 blue)\r
+#define PLED3OUT P5OUT\r
+#define PLED3DIR P5DIR\r
+#define PLED3PIN BIT7\r
+\r
+//mtx frx p34 \r
+//mrx ftx p35\r
+\r
+//SPI\r
+//TelosB: 29/3.1=RF_SI, 30/3.2=RF_SO, 31/3.3=RF_SCLK\r
+//ApiMote: 29/3.1=RF_SI, 30/3.2=RF_SO, 31/3.3=RF_SCLK\r
+#define SPIOUT P3OUT\r
+#define SPIDIR P3DIR\r
+#define SPIIN P3IN\r
+#define SPIREN P3REN\r
+\r
+/* For the radio to be used:\r
+ 2.7 (!RST) must be low\r
+ 2.0 (VREF_EN) must be high (cc2420-41 rf_vreg)\r
+ 3.0 (!CS) must be low for the transaction.\r
+*/\r
+\r
+\r
+/* TODO what to do here?. Hopefully nothing.\r
+#define INITPLATFORM \\r
+ P1DIR = 0xe0;\\r
+ P1OUT = 0x00;\\r
+ P2DIR = 0x7b;\\r
+ P2OUT = 0x10;\\r
+ P3DIR = 0xf1;\\r
+ P3OUT = 0x00;\\r
+ P4DIR = 0xfd;\\r
+ P4OUT = 0xFd;\\r
+ P5DIR = 0xff;\\r
+ P5OUT = 0xff;\\r
+ P6DIR = 0xff;\\r
+ P6OUT = 0x00;\r
+*/\r
+\r
+//RF Control\r
+//TelosB: Radio CS is 38/P4.2 (to CC2420 pin31)\r
+//ApiMote: Radio CS is 28/P3.0\r
+#define SETSS P3OUT|=BIT0\r
+#define CLRSS P3OUT&=~BIT0\r
+#define DIRSS P3DIR|=BIT0\r
+\r
+//CC2420 Chip Enable\r
+//TelosB: Radio RESETn is 42/P4.6 (to CC2420 pin21)\r
+//ApiMote: Radio RESETn is 27/P2.7 (to CC2420 pin21)\r
+#define SETCE P2OUT|=BIT7\r
+#define CLRCE P2OUT&=~BIT7\r
+#define DIRCE P2DIR|=BIT7\r
+\r
+//CC2420 signals\r
+#define SFD (P2IN&BIT6) //TelosB 37/P4.1 -> ApiMote 26/P2.6\r
+#define FIFOP (P2IN&BIT4) //TelosB 12/P1.0 -> ApiMote 24/P2.4 (rf_pkt cc2420-29)\r
+#define FIFO (P2IN&BIT3) //TelosB 15/P1.3 -> ApiMote 23/P2.3 (rf_gio0 cc2420-30)\r
+\r
+// network byte order converters\r
+#define htons(x) ((((uint16_t)(x) & 0xFF00) >> 8) | \\r
+ (((uint16_t)(x) & 0x00FF) << 8))\r
+#define htonl(x) ((((uint32_t)(x) & 0xFF000000) >> 24) | \\r
+ (((uint32_t)(x) & 0x00FF0000) >> 8) | \\r
+ (((uint32_t)(x) & 0x0000FF00) << 8) | \\r
+ (((uint32_t)(x) & 0x000000FF) << 24))\r
+\r
+#define ntohs htons\r
+#define ntohl htonl\r
+\r