P4OUT=0;
}
-unsigned int drwidth=20;
+unsigned int drwidth=16;
//! Shift all bits of the DR.
unsigned long jtag_dr_shift20(unsigned long in){
// idle
return(jtagtransn(in,16));
}
+//! Shift native width of the DR
+unsigned long jtag_dr_shiftadr(unsigned long in){
+ unsigned long out=0;
+
+ // idle
+ SETTMS;
+ TCKTOCK;
+ // select DR
+ CLRTMS;
+ TCKTOCK;
+ // capture IR
+ TCKTOCK;
+
+
+ out=jtagtransn(in,drwidth);
+
+ // shift DR, then idle
+ return(out);
+}
+
//! Shift 8 bits of the IR.
unsigned char jtag_ir_shift8(unsigned char in){
else
jtag_dr_shift16(0x2419);//byte read
jtag_ir_shift8(IR_ADDR_16BIT);
- jtag_dr_shift16(adr);//address
+ jtag_dr_shiftadr(adr);//address
jtag_ir_shift8(IR_DATA_TO_ADDR);
SETTCLK;
else
jtag_dr_shift16(0x2418);//byte write
jtag_ir_shift8(IR_ADDR_16BIT);
- jtag_dr_shift16(adr);
+ jtag_dr_shiftadr(adr);
jtag_ir_shift8(IR_DATA_TO_ADDR);
jtag_dr_shift16(data);
SETTCLK;
jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
jtag_dr_shift16(0x2408);//word write
jtag_ir_shift8(IR_ADDR_16BIT);
- jtag_dr_shift16(adr);
+ jtag_dr_shiftadr(adr);
jtag_ir_shift8(IR_DATA_TO_ADDR);
jtag_dr_shift16(data);
SETTCLK;
//MSP430 or MSP430X
if(jtagid==MSP430JTAGID){
jtag430mode=MSP430MODE;
- drwidth=16;
+
+ /* So the way this works is that a width of 20 does some
+ backward-compatibility finagling, causing the correct value
+ to be exchanged for addresses on 16-bit chips as well as the
+ new MSP430X chips. (This has only been verified on the
+ MSP430F2xx family. TODO verify for others.)
+ */
+
+ drwidth=20;
//Perform a reset and disable watchdog.
jtag430_por();
//! Shift n bytes.
unsigned long jtagtransn(unsigned long word,
unsigned int bitcount);
+//! Shift the address width.
+unsigned long jtag_dr_shiftadr(unsigned long in);
//! Shift 8 bits of the IR.
unsigned char jtag_ir_shift8(unsigned char);
//! Shift 16 bits of the DR.