def ARMtest(self):
self.ARMreleasecpu()
self.ARMhaltcpu()
- #print "Status: %s" % self.ARMstatusstr()
+ print "Status: %s" % self.ARMstatusstr()
#Grab ident three times, should be equal.
ident1=self.ARMident()
print "Error, repeated ident attempts unequal."
print "%04x, %04x, %04x" % (ident1, ident2, ident3)
+ #Set and Check Registers
+ regs = [1024+x for x in range(1,15)]
+ regr = []
+ for x in range(len(regs)):
+ self.ARMset_register(x, regs[x])
+
+ for x in range(len(regs)):
+ regr.append(self.ARMget_register(x))
+
+ for x in range(len(regs)):
+ if regs[x] != regr[x]:
+ print "Error, R%d fail: %x != %x"%(x,regs[x],regr[x])
+
+ return
+
+
+
+
#Single step, printing PC.
print "Tracing execution at startup."
- for i in range(1,15):
+ for i in range(15):
pc=self.ARMgetPC()
byte=self.ARMpeekcodebyte(i)
#print "PC=%04x, %02x" % (pc, byte)
self.writecmd(0x33,SETUP,0,self.data)
def ARMget_dbgstate(self):
"""Read the config register of an ARM."""
- self.writecmd(0x33,GET_DEBUG_STATE,0,self.data)
- print "DEBUGGING get_dbgstate: %s"%repr(self.data)
retval = struct.unpack("<L", self.data[:4])[0]
return retval
def ARMget_dbgctrl(self):
def ARMget_register(self, reg):
"""Get an ARM's Register"""
self.writecmd(0x33,GET_REGISTER,1,[reg&0xff])
- print "DEBUG:GET_REGISTER: %s"%asp.hexText(self.data)
retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
return retval
def ARMset_register(self, reg, val):
"""Get an ARM's Register"""
- self.writecmd(0x33,GET_REGISTER,20,[reg,0,0,0,val>>24, (val>>16)&0xff, (val>>8)&0xff, val&0xff,9,8,7,6,5,4,3,2,1,0,2,3])
- print "DEBUG:SET_REGISTER: %s"%asp.hexText(self.data)
+ self.writecmd(0x33,SET_REGISTER,8,[reg,0,0,0,val&0xff, (val>>8)&0xff, (val>>16)&0xff, val>>24])
+ #self.writecmd(0x33,SET_REGISTER,8,[reg,0,0,0, (val>>16)&0xff, val>>24, val&0xff, (val>>8)&0xff])
retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
return retval
def ARMget_registers(self):
- """Get an ARM's Register"""
- clear = [x for x in range(20)]
- self.writecmd(0x33,GET_REGISTERS,20,clear)
- print "DEBUG:GET_REGISTER: %s"%asp.hexText(self.data)
+ """Get ARM Registers"""
+ self.writecmd(0x33,GET_REGISTERS,0, [])
retval = []
for x in range(0,len(self.data), 4):
retval.append(struct.unpack("<L", self.data[x:x+4])[0])
- #retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
return retval
def ARMset_registers(self, regs):
- """Get an ARM's Register"""
+ """Set ARM Registers"""
regarry = []
for reg in regs:
- regarry.extend([reg>>24, (reg>>16)&0xff, (reg>>8)&0xff, reg&0xff])
- self.writecmd(0x33,GET_REGISTER,16*4,regarry)
- print "DEBUG:SET_REGISTER: %s"%asp.hexText(self.data)
- #retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
- #return retval
+ regarry.extend([reg&0xff, (reg>>8)&0xff, (reg>>16)&0xff, reg>>24])
+ self.writecmd(0x33,SET_REGISTERS,16*4,regarry)
+ retval = struct.unpack("<L", "".join(self.data[0:4]))[0]
+ return retval
def ARMcmd(self,phrase):
self.writecmd(0x33,READ,len(phrase),phrase)
val=ord(self.data[0])
debughex32(jtagarm7tdmi_nop( 0));
debughex32(jtagarm7tdmi_nop( 0));
debughex32(jtagarm7tdmi_instr_primitive(parameter, 0)); // inject long
- debughex32(jtagarm7tdmi_nop( 0));
retval = jtagarm7tdmi_nop( 0);
debughex32(retval);
debughex32(jtagarm7tdmi_nop( 0));
+ debughex32(jtagarm7tdmi_nop( 0));
return(retval);
}
//! Retrieve a 32-bit Register value
-unsigned long jtagarm7tdmi_get_register(unsigned char reg) {
+unsigned long jtagarm7tdmi_get_register(unsigned long reg) {
unsigned long retval = 0, instr;
// push nop into pipeline - clean out the pipeline...
- instr = ARM_READ_REG | (reg<<12); // push STR Rx, [R14] into pipeline
-
- debughex32(jtagarm7tdmi_nop( 0));
- debughex32(jtagarm7tdmi_instr_primitive(instr, 0));
- debughex32(jtagarm7tdmi_nop( 0)); // push nop into pipeline - fetched
- debughex32(jtagarm7tdmi_nop( 0)); // push nop into pipeline - decoded
+ instr = (unsigned long)(reg<<12) | (unsigned long)ARM_READ_REG; // STR Rx, [R14]
+ //instr = (unsigned long)(((unsigned long)reg<<12) | ARM_READ_REG);
+ debughex32(instr);
+
+ jtagarm7tdmi_nop( 0);
+ jtagarm7tdmi_instr_primitive(instr, 0);
+ jtagarm7tdmi_nop( 0); // push nop into pipeline - fetched
+ jtagarm7tdmi_nop( 0); // push nop into pipeline - decoded
jtagarm7tdmi_nop( 0); // push nop into pipeline - executed
retval = jtagarm7tdmi_nop( 0); // recover 32-bit word
debughex32(retval);
- debughex32(jtagarm7tdmi_nop( 0));
- debughex32(jtagarm7tdmi_nop( 0));
- debughex32(jtagarm7tdmi_nop( 0));
+ jtagarm7tdmi_nop( 0);
+ jtagarm7tdmi_nop( 0);
+ jtagarm7tdmi_nop( 0);
return retval;
}
//! Set a 32-bit Register value
-unsigned long jtagarm7tdmi_set_register(unsigned char reg, unsigned long val) {
- unsigned long retval = 0, instr;
- instr = ARM_WRITE_REG | (reg<<12); // push LDR Rx, [R14] into pipeline
-
- debughex32(jtagarm7tdmi_nop( 0)); // push nop into pipeline - clean out the pipeline...
- debughex32(jtagarm7tdmi_instr_primitive(instr, 0)); // push nop into pipeline - fetch
- debughex32(jtagarm7tdmi_nop( 0)); // push nop into pipeline - decode
- debughex32(jtagarm7tdmi_nop( 0)); // push nop into pipeline - execute
+void jtagarm7tdmi_set_register(unsigned long reg, unsigned long val) {
+ unsigned long instr;
+ instr = (unsigned long)(((unsigned long)reg<<12) | ARM_WRITE_REG); // LDR Rx, [R14]
+ debugstr("Writing:");
+ debughex32(instr);
+ debughex32(val);
+ jtagarm7tdmi_nop( 0); // push nop into pipeline - clean out the pipeline...
+ jtagarm7tdmi_instr_primitive(instr, 0); // push instr into pipeline - fetch
+ jtagarm7tdmi_nop( 0); // push nop into pipeline - decode
+ jtagarm7tdmi_nop( 0); // push nop into pipeline - execute
- debughex32(jtagarm7tdmi_instr_primitive(val, 0)); // push 32-bit word on data bus
- debughex32(jtagarm7tdmi_nop( 0)); // push nop into pipeline - executed
+ //debughex32(jtagarm7tdmi_instr_primitive(val, 0)); // push 32-bit word on data bus
+ jtagarm7tdmi_instr_primitive(val, 0); // push 32-bit word on data bus
+ jtagarm7tdmi_nop( 0); // push nop into pipeline - executed
//if (reg == ARM_REG_PC){
- debughex32(jtagarm7tdmi_nop( 0));
- debughex32(jtagarm7tdmi_nop( 0));
+ jtagarm7tdmi_nop( 0);
+ jtagarm7tdmi_nop( 0);
//}
- debughex32(jtagarm7tdmi_nop( 0));
-
- retval = cmddatalong[5];
- return(retval);
+ jtagarm7tdmi_nop( 0);
}
-//! Get all registers. Return an array
-unsigned long* jtagarm7tdmi_get_registers() {
- debughex32(jtagarm7tdmi_instr_primitive(ARM_INSTR_SKANKREGS,0));
- debughex32(jtagarm7tdmi_nop( 0));
- debughex32(jtagarm7tdmi_nop( 0));
- debughex32(jtagarm7tdmi_nop( 0));
- debughex32(jtagarm7tdmi_nop( 0));
- debughex32(jtagarm7tdmi_nop( 0));
+//! Get all registers, placing them into cmddatalong[0-15]
+void jtagarm7tdmi_get_registers() {
+ debughex32(ARM_INSTR_SKANKREGS1);
debughex32(jtagarm7tdmi_nop( 0));
+ debughex32(jtagarm7tdmi_instr_primitive(ARM_INSTR_SKANKREGS1,0));
debughex32(jtagarm7tdmi_nop( 0));
debughex32(jtagarm7tdmi_nop( 0));
+ cmddatalong[ 0] = jtagarm7tdmi_nop( 0);
+ cmddatalong[ 1] = jtagarm7tdmi_nop( 0);
+ cmddatalong[ 2] = jtagarm7tdmi_nop( 0);
+ cmddatalong[ 3] = jtagarm7tdmi_nop( 0);
+ cmddatalong[ 4] = jtagarm7tdmi_nop( 0);
+ cmddatalong[ 5] = jtagarm7tdmi_nop( 0);
+ cmddatalong[ 6] = jtagarm7tdmi_nop( 0);
+ cmddatalong[ 7] = jtagarm7tdmi_nop( 0);
+ debughex32(ARM_INSTR_SKANKREGS2);
debughex32(jtagarm7tdmi_nop( 0));
+ //jtagarm7tdmi_nop( 0);
+ debughex32(jtagarm7tdmi_instr_primitive(ARM_INSTR_SKANKREGS2,0));
debughex32(jtagarm7tdmi_nop( 0));
debughex32(jtagarm7tdmi_nop( 0));
- debughex32(jtagarm7tdmi_nop( 0));
- debughex32(jtagarm7tdmi_nop( 0));
- debughex32(jtagarm7tdmi_nop( 0));
- debughex32(jtagarm7tdmi_nop( 0));
- debughex32(jtagarm7tdmi_nop( 0));
- debughex32(jtagarm7tdmi_nop( 0));
- debughex32(jtagarm7tdmi_nop( 0));
- debughex32(jtagarm7tdmi_nop( 0));
- return registers;
+ //jtagarm7tdmi_nop( 0);
+ //jtagarm7tdmi_nop( 0);
+ cmddatalong[ 8] = jtagarm7tdmi_nop( 0);
+ cmddatalong[ 9] = jtagarm7tdmi_nop( 0);
+ cmddatalong[10] = jtagarm7tdmi_nop( 0);
+ cmddatalong[11] = jtagarm7tdmi_nop( 0);
+ cmddatalong[12] = jtagarm7tdmi_nop( 0);
+ cmddatalong[13] = jtagarm7tdmi_nop( 0);
+ cmddatalong[14] = jtagarm7tdmi_nop( 0);
+ cmddatalong[15] = jtagarm7tdmi_nop( 0);
+ jtagarm7tdmi_nop( 0);
}
-//! Get all registers. Return an array
-unsigned long* jtagarm7tdmi_set_registers() { //FIXME: BORKEN... TOTALLY TRYING TO BUY A VOWEL
- debughex32(jtagarm7tdmi_instr_primitive(ARM_INSTR_SKANKREGS,0));
- debughex32(jtagarm7tdmi_nop( 0));
- debughex32(jtagarm7tdmi_nop( 0));
+//! Set all registers from cmddatalong[0-15]
+void jtagarm7tdmi_set_registers() { //FIXME: BORKEN... TOTALLY TRYING TO BUY A VOWEL
+ debughex32(ARM_INSTR_CLOBBEREGS);
+ jtagarm7tdmi_nop( 0);
+ debughex32(jtagarm7tdmi_instr_primitive(ARM_INSTR_CLOBBEREGS,0));
+ jtagarm7tdmi_nop( 0);
+ jtagarm7tdmi_nop( 0);
debughex32(jtagarm7tdmi_instr_primitive(0x40,0));
debughex32(jtagarm7tdmi_instr_primitive(0x41,0));
debughex32(jtagarm7tdmi_instr_primitive(0x42,0));
debughex32(jtagarm7tdmi_instr_primitive(0x4d,0));
debughex32(jtagarm7tdmi_instr_primitive(0x4e,0));
debughex32(jtagarm7tdmi_instr_primitive(0x4f,0));
- return registers;
}
//! Retrieve the CPSR Register value
unsigned long jtagarm7tdmi_get_regCPSR() {
unsigned long retval = 0;
- cmddatalong[1] = jtagarm7tdmi_nop( 0); // push nop into pipeline - clean out the pipeline...
- cmddatalong[2] = jtagarm7tdmi_instr_primitive(ARM_INSTR_MRS_R0_CPSR, 0); // push MRS_R0, CPSR into pipeline
- cmddatalong[3] = jtagarm7tdmi_nop( 0); // push nop into pipeline - fetched
- cmddatalong[4] = jtagarm7tdmi_nop( 0); // push nop into pipeline - decoded
- cmddatalong[5] = jtagarm7tdmi_nop( 0); // push nop into pipeline - executed
+ debughex32(jtagarm7tdmi_nop( 0)); // push nop into pipeline - clean out the pipeline...
+ debughex32(jtagarm7tdmi_instr_primitive(ARM_INSTR_MRS_R0_CPSR, 0)); // push MRS_R0, CPSR into pipeline
+ debughex32(jtagarm7tdmi_nop( 0)); // push nop into pipeline - fetched
+ debughex32(jtagarm7tdmi_nop( 0)); // push nop into pipeline - decoded
+ debughex32(jtagarm7tdmi_nop( 0)); // push nop into pipeline - executed
retval = jtagarm7tdmi_nop( 0); // recover 32-bit word
- cmddatalong[6] = retval;
+ debughex32(retval);
return retval;
}
unsigned long jtagarm7tdmi_set_regCPSR(unsigned long val) {
unsigned long retval = 0;
- cmddatalong[1] = jtagarm7tdmi_nop( 0); // push nop into pipeline - clean out the pipeline...
- cmddatalong[1] = jtagarm7tdmi_instr_primitive(ARM_INSTR_MSR_cpsr_cxsf_R0, 0); // push MSR cpsr_cxsf, R0 into pipeline
- cmddatalong[2] = jtagarm7tdmi_nop( 0); // push nop into pipeline - fetched
- cmddatalong[3] = jtagarm7tdmi_nop( 0); // push nop into pipeline - decoded
+ debughex32(jtagarm7tdmi_nop( 0)); // push nop into pipeline - clean out the pipeline...
+ debughex32(jtagarm7tdmi_instr_primitive(ARM_INSTR_MSR_cpsr_cxsf_R0, 0)); // push MSR cpsr_cxsf, R0 into pipeline
+ debughex32(jtagarm7tdmi_nop( 0)); // push nop into pipeline - fetched
+ debughex32(jtagarm7tdmi_nop( 0)); // push nop into pipeline - decoded
retval = jtagarm7tdmi_instr_primitive(val, 0);// push 32-bit word on data bus
- cmddatalong[5] = jtagarm7tdmi_nop( 0); // push nop into pipeline - executed
- cmddatalong[4] = retval;
+ debughex32(jtagarm7tdmi_nop( 0)); // push nop into pipeline - executed
+ debughex32(retval);
return(retval);
}
}
//! Set Program Counter
-unsigned long jtagarm7tdmi_setpc(unsigned long adr){
- return jtagarm7tdmi_set_register(ARM_REG_PC, adr);
+void jtagarm7tdmi_setpc(unsigned long adr){
+ jtagarm7tdmi_set_register(ARM_REG_PC, adr);
}
//! Halt CPU - returns 0xffff if the operation fails to complete within
void jtagarm7tdmihandle(unsigned char app, unsigned char verb, unsigned long len){
register char blocks;
- unsigned int i,val,mlop;
+ unsigned int i,val;
unsigned long at;
jtagarm7tdmi_resettap();
switch(verb){
case START:
//Enter JTAG mode.
- cmddatalong[0] = jtagarm7tdmi_start();
- cmddatalong[2] = jtagarm7tdmi_haltcpu();
+ debughex32(jtagarm7tdmi_start());
+ debughex32(jtagarm7tdmi_haltcpu());
//jtagarm7tdmi_resettap();
- cmddatalong[1] = jtagarm7tdmi_get_dbgstate();
+ debughex32(jtagarm7tdmi_get_dbgstate());
// DEBUG: FIXME: NOT PART OF OPERATIONAL CODE
//for (mlop=2;mlop<4;mlop++){
// jtagarm7tdmi_set_register(mlop, 0x43424140);
//}
/////////////////////////////////////////////
- txdata(app,verb,0xc);
+ txdata(app,verb,0x4);
break;
case JTAGARM7TDMI_READMEM:
case PEEK:
//case JTAGARM7TDMI_WRITEFLASH:
//case JTAGARM7TDMI_ERASEFLASH:
case JTAGARM7TDMI_SET_PC:
- cmddatalong[0] = jtagarm7tdmi_setpc(cmddatalong[0]);
- txdata(app,verb,4);
+ jtagarm7tdmi_setpc(cmddatalong[0]);
+ txdata(app,verb,0);
break;
case JTAGARM7TDMI_GET_DEBUG_CTRL:
cmddatalong[0] = jtagarm7tdmi_get_dbgctrl();
//case JTAGARM7TDMI_SET_WATCHPOINT:
case JTAGARM7TDMI_GET_REGISTER:
jtagarm7tdmi_resettap();
- cmddatalong[0] = jtagarm7tdmi_get_register(cmddata[0]);
- //cmddatalong[0] = test_get_register(cmddata[0]);
- txdata(app,verb,96);
+ val = cmddata[0];
+ cmddatalong[0] = jtagarm7tdmi_get_register(val);
+ txdata(app,verb,4);
break;
case JTAGARM7TDMI_SET_REGISTER: // FIXME: NOT AT ALL CORRECT, THIS IS TESTING CODE ONLY
jtagarm7tdmi_resettap();
- cmddatalong[0] = cmddatalong[1];
jtagarm7tdmi_set_register(cmddata[0], cmddatalong[1]);
- //test_set_register(cmddata[0], cmddatalong[1]);
- txdata(app,verb,96);
+ cmddatalong[0] = cmddatalong[1];
+ txdata(app,verb,4);
break;
case JTAGARM7TDMI_GET_REGISTERS:
jtagarm7tdmi_resettap();
jtagarm7tdmi_get_registers();
- txdata(app,verb,200);
+ txdata(app,verb,64);
break;
case JTAGARM7TDMI_SET_REGISTERS:
jtagarm7tdmi_resettap();
jtagarm7tdmi_set_registers();
- txdata(app,verb,200);
+ txdata(app,verb,64);
break;
case JTAGARM7TDMI_DEBUG_INSTR:
jtagarm7tdmi_resettap();
-unsigned long registers[16]; // constant array
unsigned char current_chain;
unsigned char last_halt_debug_state = -1;
unsigned long last_halt_pc = -1;
unsigned long jtagarm7tdmi_releasecpu();
//! Set the program counter.
-unsigned long jtagarm7tdmi_setpc(unsigned long adr);
+void jtagarm7tdmi_setpc(unsigned long adr);
//! Write data to address.
unsigned long jtagarm7tdmi_writeflash(unsigned long adr, unsigned long data);
// for deeper understanding, read the instruction cycle timing section of:
// http://www.atmel.com/dyn/resources/prod_documents/DDI0029G_7TDMI_R3_trm.pdf
-#define EXECNOPARM 0xe1a00000
-#define ARM_INSTR_NOP 0xe1a00000
-#define ARM_INSTR_STR_Rx_r14 0xe58e0000
+#define EXECNOPARM 0xe1a00000L
+#define ARM_INSTR_NOP 0xe1a00000L
+#define ARM_INSTR_STR_Rx_r14 0xe58e0000L
#define ARM_READ_REG ARM_INSTR_STR_Rx_r14
-#define ARM_INSTR_LDR_Rx_r14 0xe59e0000
+#define ARM_INSTR_LDR_Rx_r14 0xe59e0000L
#define ARM_WRITE_REG ARM_INSTR_LDR_Rx_r14
-#define ARM_INSTR_LDR_R1_r0_4 0xe4901004
+#define ARM_INSTR_LDR_R1_r0_4 0xe4901004L
#define ARM_READ_MEM ARM_INSTR_LDR_R1_r0_4
-#define ARM_INSTR_MRS_R0_CPSR 0xf10f0000
-#define ARM_INSTR_MSR_cpsr_cxsf_R0 0xe12ff000
-#define ARM_INSTR_STM_R0_r0_r15 0x
-#define ARM_INSTR_STMIA_R14_r0_rx 0xE88E0000 // add up to 65k to indicate which registers...
+#define ARM_INSTR_MRS_R0_CPSR 0xf10f0000L
+#define ARM_INSTR_MSR_cpsr_cxsf_R0 0xe12ff000L
+#define ARM_INSTR_STMIA_R14_r0_rx 0xE88E0000L // add up to 65k to indicate which registers...
#define ARM_STORE_MULTIPLE ARM_INSTR_STMIA_R14_r0-rx
-#define ARM_INSTR_SKANKREGS 0xE88Effff
-#define ARM_INSTR_CLOBBEREGS 0xE88Effff
-
-#define ARM_INSTR_B_PC 0xea000000
-#define ARM_INSTR_BX_PC 0xe1200010 // need to set r0 to the desired address
-#define THUMB_INSTR_STR_R0_r0 0x60006000
-#define THUMB_INSTR_MOV_R0_PC 0x46b846b8
-#define THUMB_INSTR_BX_PC 0x47784778
-#define THUMB_INSTR_NOP 0x1c001c00
+#define ARM_INSTR_SKANKREGS1 0xE88E00ffL
+#define ARM_INSTR_SKANKREGS2 0xE88Eff00L
+#define ARM_INSTR_CLOBBEREGS 0xE89EffffL
+
+#define ARM_INSTR_B_PC 0xea000000L
+#define ARM_INSTR_BX_PC 0xe1200010L // need to set r0 to the desired address
+#define THUMB_INSTR_STR_R0_r0 0x60006000L
+#define THUMB_INSTR_MOV_R0_PC 0x46b846b8L
+#define THUMB_INSTR_BX_PC 0x47784778L
+#define THUMB_INSTR_NOP 0x1c001c00L
#define ARM_REG_PC 15
#define JTAG_ARM7TDMI_DBG_DBGACK 1