# very end of the command line, so they only have an effect for a
# default linker script
GCC?=msp430-gcc
-LDFLAGS?=-Wl,-dT ldscripts/$(mcu).x
+LDFLAGS?=-mmcu=$(mcu) #-Wl,-dT ldscripts/$(mcu).x
CCEXTRA?= $(CFLAGS) -D$(mcu) -D$(platform) -Dplatform=$(platform) -Dboard=$(board) $(GCCINC) -I include -I platforms
CC=$(GCC) -Wall -Os -fno-strict-aliasing -g -mmcu=$(mcu) $(CCEXTRA)
mcu = undef
ifneq (,$(findstring $(board),goodfet20 goodfet10 goodfet11))
-mcu := msp430x1612
+mcu := msp430f1612
platform := goodfet
endif
ifneq (,$(findstring $(board),goodfet21))
-mcu := msp430x2618
+mcu := msp430f2618
platform := goodfet
endif
ifneq (,$(findstring $(board),goodfet30 goodfet31))
-mcu := msp430x2274
+mcu := msp430f2274
platform := goodfet
# This will link to fit in a '2254, so unneeded packages should be omited.
CONFIG_ccspi = n
endif
ifneq (,$(findstring $(board),goodfet40 goodfet41))
-mcu := msp430x2618
+mcu := msp430f2618
platform := goodfet
endif
ifneq (,$(findstring $(board),nhb12b))
-mcu := msp430x2618
+mcu := msp430f2618
CONFIG_nrf = y
platform := nhb12b
endif
ifneq (,$(findstring $(board),nhb12))
-mcu := msp430x2618
+mcu := msp430f2618
CONFIG_nrf = y
platform := nhb12
endif
ifneq (,$(findstring $(board),goodfet50 goodfet51))
-mcu := msp430x5510
+mcu := msp430f5510
platform := goodfet
endif
ifeq ($(board),telosb)
-mcu := msp430x1612
+mcu := msp430f1611
platform := telosb
config := monitor spi ccspi
CFLAGS += -Duseuart1
endif
ifeq ($(board),telosbbt)
-mcu :=msp430x1612
+mcu :=msp430f1612
platform := telosb
config := monitor spi ccspi
endif
endif
ifneq (,$(findstring $(board),tilaunchpad))
-mcu :=msp430x1612
+mcu :=msp430f1612
CFLAGS := -DDEBUG_LEVEL=3 -DDEBUG_START=1 -DINBAND_DEBUG
#CFLAGS+= -Werror
config := monitor chipcon i2c
#define u32 unsigned long
-#ifdef msp430x2274
+#ifdef msp430f2274
//256 bytes, plus overhead
//For chips with very little RAM.
#define CMDDATALEN 0x104
--- /dev/null
+//! MSP430F1612/1611 clock and I/O definitions
+
+#include "platform.h"
+
+#ifdef __MSPGCC__
+#include <msp430.h>
+#else
+#include <signal.h>
+#include <io.h>
+#include <iomacros.h>
+#endif
+
+//! Receive a byte.
+unsigned char serial0_rx(){
+ char c;
+
+ while(!(IFG1&URXIFG0));//wait for a byte
+ c = RXBUF0;
+ IFG1&=~URXIFG0;
+ U0TCTL &= ~URXSE;
+
+ return c;
+}
+
+//! Receive a byte.
+unsigned char serial1_rx(){
+ char c;
+
+ while(!(IFG2&URXIFG1));//wait for a byte
+ c = RXBUF1;
+ IFG2&=~URXIFG1;
+ U1TCTL &= ~URXSE;
+
+ return c;
+}
+
+//! Transmit a byte.
+void serial0_tx(unsigned char x){
+ while ((IFG1 & UTXIFG0) == 0); //loop until buffer is free
+ TXBUF0 = x;
+}
+
+//! Transmit a byte on the second UART.
+void serial1_tx(unsigned char x){
+ while ((IFG2 & UTXIFG1) == 0); //loop until buffer is free
+ TXBUF1 = x;
+}
+
+/** Later, add support for the EZ430/FETUIF with 12MHz crystal
+ UBR00=0xE2; UBR10=0x04; UMCTL0=0x00; // uart0 12000000Hz 9600bps
+ UBR00=0x71; UBR10=0x02; UMCTL0=0x00; // uart0 12000000Hz 19200bps
+ UBR00=0x38; UBR10=0x01; UMCTL0=0x55; // uart0 12000000Hz 38400bps
+ UBR00=0xD0; UBR10=0x00; UMCTL0=0x4A; // uart0 12000000Hz 57581bps
+ UBR00=0x68; UBR10=0x00; UMCTL0=0x04; // uart0 12000000Hz 115273bps
+ */
+
+//! Set the baud rate.
+void setbaud0(unsigned char rate){
+
+ //http://mspgcc.sourceforge.net/baudrate.html
+ switch(rate){
+ case 1://9600 baud
+ UBR00=0x7F; UBR10=0x01; UMCTL0=0x5B; /* uart0 3683400Hz 9599bps */
+ break;
+ case 2://19200 baud
+ UBR00=0xBF; UBR10=0x00; UMCTL0=0xF7; /* uart0 3683400Hz 19194bps */
+ break;
+ case 3://38400 baud
+ UBR00=0x5F; UBR10=0x00; UMCTL0=0xBF; /* uart0 3683400Hz 38408bps */
+ break;
+ case 4://57600 baud
+ UBR00=0x40; UBR10=0x00; UMCTL0=0x00; /* uart0 3683400Hz 57553bps */
+ break;
+ default:
+ case 5://115200 baud
+ UBR00=0x20; UBR10=0x00; UMCTL0=0x00; /* uart0 3683400Hz 115106bps */
+ break;
+ }
+}
+
+//! Set the baud rate of the second uart.
+void setbaud1(unsigned char rate){
+ //http://mspgcc.sourceforge.net/baudrate.html
+ switch(rate){
+ case 1://9600 baud
+ UBR01=0x7F; UBR11=0x01; UMCTL1=0x5B; /* uart0 3683400Hz 9599bps */
+ break;
+ case 2://19200 baud
+ UBR01=0xBF; UBR11=0x00; UMCTL1=0xF7; /* uart0 3683400Hz 19194bps */
+ break;
+ case 3://38400 baud
+ UBR01=0x5F; UBR11=0x00; UMCTL1=0xBF; /* uart0 3683400Hz 38408bps */
+ break;
+ case 4://57600 baud
+ UBR01=0x40; UBR11=0x00; UMCTL1=0x00; /* uart0 3683400Hz 57553bps */
+ break;
+ default:
+ case 5://115200 baud
+ UBR01=0x20; UBR11=0x00; UMCTL1=0x00; /* uart0 3683400Hz 115106bps */
+ break;
+ }
+}
+
+
+void msp430_init_uart0(){
+ /* RS232 */
+
+ P3SEL |= BIT4|BIT5; // P3.4,5 = USART0 TXD/RXD
+ P3DIR |= BIT4;
+
+ UCTL0 = SWRST | CHAR; /* 8-bit character, UART mode */
+ UTCTL0 = SSEL1; /* UCLK = MCLK */
+
+ setbaud0(0);
+
+ ME1 &= ~USPIE0; /* USART1 SPI module disable */
+ ME1 |= (UTXE0 | URXE0); /* Enable USART1 TXD/RXD */
+
+ UCTL0 &= ~SWRST;
+
+ /* XXX Clear pending interrupts before enable!!! */
+ U0TCTL |= URXSE;
+
+
+ //IE1 |= URXIE1; /* Enable USART1 RX interrupt */
+}
+
+
+void msp430_init_uart1(){
+
+ /* RS232 */
+ P3DIR &= ~0x80; /* Select P37 for input (UART1RX) */
+ P3DIR |= 0x40; /* Select P36 for output (UART1TX) */
+ P3SEL |= 0xC0; /* Select P36,P37 for UART1{TX,RX} */
+
+ UCTL1 = SWRST | CHAR; /* 8-bit character, UART mode */
+ UTCTL1 = SSEL1; /* UCLK = MCLK */
+
+ setbaud1(0);
+
+ ME2 &= ~USPIE1; /* USART1 SPI module disable */
+ ME2 |= (UTXE1 | URXE1); /* Enable USART1 TXD/RXD */
+
+ UCTL1 &= ~SWRST;
+
+ /* XXX Clear pending interrupts before enable!!! */
+ U1TCTL |= URXSE;
+
+ //IE2 |= URXIE1; /* Enable USART1 RX interrupt */
+}
+
+
+/** For EZ430/FETUIF
+ void msp430_init_dco() {
+ WDTCTL = WDTPW + WDTHOLD; //stop WDT
+
+ BCSCTL1 = 0;
+
+ do {
+ int i;
+ IFG1 &= ~OFIFG;
+ for (i=0; i<1000; i++);
+
+ } while (IFG1 & OFIFG);
+
+ BCSCTL2 = SELM1 | DIVM1 | SELS;
+
+}
+ */
+
+
+//! Initialization is correct.
+void msp430_init_dco_done(){
+ //Nothing to do for the 1612.
+}
+
+
+void msp430_init_dco() {
+/* This code taken from the FU Berlin sources and reformatted. */
+ //
+
+//Works well.
+//#define MSP430_CPU_SPEED 2457600UL
+
+//Too fast for internal resistor.
+//#define MSP430_CPU_SPEED 4915200UL
+
+//Max speed.
+//#define MSP430_CPU_SPEED 4500000UL
+
+//baud rate speed
+#define MSP430_CPU_SPEED 3683400UL
+#define DELTA ((MSP430_CPU_SPEED) / (32768 / 8))
+ unsigned int compare, oldcapture = 0;
+ unsigned int i;
+
+ WDTCTL = WDTPW + WDTHOLD; //stop WDT
+
+
+ DCOCTL=0xF0;
+ //a4
+ //1100
+
+ /* ACLK is devided by 4. RSEL=6 no division for MCLK
+ and SSMCLK. XT2 is off. */
+ //BCSCTL1 = 0xa8;
+
+ BCSCTL2 = 0x00; /* Init FLL to desired frequency using the 32762Hz
+ crystal DCO frquenzy = 2,4576 MHz */
+
+ PLEDOUT|=PLEDPIN;
+
+ BCSCTL1 |= DIVA1 + DIVA0; /* ACLK = LFXT1CLK/8 */
+ for(i = 0xffff; i > 0; i--) { /* Delay for XTAL to settle */
+ asm("nop");
+ }
+
+ CCTL2 = CCIS0 + CM0 + CAP; // Define CCR2, CAP, ACLK
+ TACTL = TASSEL1 + TACLR + MC1; // SMCLK, continous mode
+
+
+ while(1) {
+
+ while((CCTL2 & CCIFG) != CCIFG); /* Wait until capture occured! */
+ CCTL2 &= ~CCIFG; /* Capture occured, clear flag */
+ compare = CCR2; /* Get current captured SMCLK */
+ compare = compare - oldcapture; /* SMCLK difference */
+ oldcapture = CCR2; /* Save current captured SMCLK */
+
+ if(DELTA == compare) {
+ break; /* if equal, leave "while(1)" */
+ } else if(DELTA < compare) { /* DCO is too fast, slow it down */
+ DCOCTL--;
+ if(DCOCTL == 0xFF) { /* Did DCO role under? */
+ BCSCTL1--;
+ }
+ } else { /* -> Select next lower RSEL */
+ DCOCTL++;
+ if(DCOCTL == 0x00) { /* Did DCO role over? */
+ BCSCTL1++;
+ }
+ /* -> Select next higher RSEL */
+ }
+ }
+
+ CCTL2 = 0; /* Stop CCR2 function */
+ TACTL = 0; /* Stop Timer_A */
+
+ BCSCTL1 &= ~(DIVA1 + DIVA0); /* remove /8 divisor from ACLK again */
+
+ PLEDOUT=~PLEDPIN;
+
+}
+
--- /dev/null
+
+#include "msp430f1611.c"
--- /dev/null
+
+//platform.h will handle patching Port 5 to be Port 3.
+
+
+#include "msp430f2618.c"
--- /dev/null
+
+//platform.h will handle patching Port 5 to be Port 3.
+
+
+#include "msp430f2618.c"
--- /dev/null
+//! MSP430F2618 clock and I/O definitions
+
+// Included by other 2xx ports, such as the 2274.
+
+#include "platform.h"
+
+#include "dco_calib.h"
+#ifdef __MSPGCC__
+#include <msp430.h>
+#else
+#include <signal.h>
+#include <io.h>
+#include <iomacros.h>
+#endif
+
+
+//! Receive a byte.
+unsigned char serial0_rx(){
+ char c;
+
+ while(!(IFG2&UCA0RXIFG));//wait for a byte
+ c = UCA0RXBUF;
+ IFG2&=~UCA0RXIFG;
+
+ //UCA0CTL1 &= ~UCA0RXSE;
+ return c;
+}
+
+//! Receive a byte.
+unsigned char serial1_rx(){
+ //TODO
+ return 00;
+}
+
+//! Transmit a byte.
+void serial0_tx(unsigned char x){
+ while ((IFG2 & UCA0TXIFG) == 0); //loop until buffer is free
+ UCA0TXBUF = x; /* send the character */
+ while(!(IFG2 & UCA0TXIFG));
+}
+//! Transmit a byte.
+void serial_tx_old(unsigned char x){
+ while ((IFG2 & UCA0TXIFG) == 0); //loop until buffer is free
+ UCA0TXBUF = x; /* send the character */
+ while(!(IFG2 & UCA0TXIFG));
+}
+
+//! Transmit a byte on the second UART.
+void serial1_tx(unsigned char x){
+
+}
+
+//! Set the baud rate.
+void setbaud0(unsigned char rate){
+
+ //Table 15-4, page 481 of 2xx Family Guide
+ switch(rate){
+ case 1://9600 baud
+ UCA0BR1 = 0x06;
+ UCA0BR0 = 0x82;
+ break;
+ case 2://19200 baud
+ UCA0BR1 = 0x03;
+ UCA0BR0 = 0x41;
+ break;
+ case 3://38400 baud
+ UCA0BR1 = 0xa0;
+ UCA0BR0 = 0x01;
+ break;
+ case 4://57600 baud
+ UCA0BR1 = 0x1d;
+ UCA0BR0 = 0x01;
+ break;
+ default:
+ case 5://115200 baud
+ UCA0BR0 = 0x8a;
+ UCA0BR1 = 0x00;
+ break;
+ }
+}
+
+//! Set the baud rate of the second uart.
+void setbaud1(unsigned char rate){
+
+}
+
+#define BAUD0EN 0x41
+#define BAUD1EN 0x03
+
+void msp430_init_uart(){
+
+ // Serial on P3.4, P3.5
+ P3SEL |= BIT4 + BIT5;
+ P3DIR |= BIT4;
+
+ //UCA0CTL1 |= UCSWRST; /* disable UART */
+
+ UCA0CTL0 = 0x00;
+ //UCA0CTL0 |= UCMSB ;
+
+ UCA0CTL1 |= UCSSEL_2; // SMCLK
+
+ //UCA0BR0 = BAUD0EN; // 115200
+ //UCA0BR1 = BAUD1EN;
+ setbaud(5);//default baud, 115200
+
+ UCA0MCTL = 0; // Modulation UCBRSx = 5
+ UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
+
+
+ //Leave this commented!
+ //Interrupt is handled by target code, not by bootloader.
+ //IE2 |= UCA0RXIE;
+}
+
+
+//! Initialization is correct.
+void msp430_init_dco_done(){
+ char *choice=(char *) 0x200; //First word of RAM.
+ choice[0]--;
+}
+
+//! Initialize the MSP430 clock.
+void msp430_init_dco() {
+ int i=1000;
+ char *choice=(char *) 0x200; //First word of RAM.
+
+ #ifdef __MSP430_HAS_PORT8__
+ P8SEL = 0; // disable XT2 on P8.7/8
+ #endif
+
+ //Set P2.6 mode for MSP430F2274
+ #ifndef __MSP430_HAS_PORT5__
+ P2SEL = 0; //disable XIN on 2274
+ #endif
+
+
+ #ifdef STATICDCO
+ BCSCTL1 = (STATICDCO>>8);
+ DCOCTL = (STATICDCO&0xFF);
+ #else
+ if(CALBC1_16MHZ!=0xFF){
+ //Info is intact, use it.
+ BCSCTL1 = CALBC1_16MHZ;
+ DCOCTL = CALDCO_16MHZ;
+ }else{
+ /*
+ Info is missing, guess at a good value.
+
+ A list of correct calibrations in included as dco_calib.c,
+ generated by script.
+ */
+ DCOCTL = 0x00; //clear DCO
+
+ BCSCTL1 = dco_calibrations[2*choice[0]+1];
+ DCOCTL = dco_calibrations[2*choice[0]];
+ choice[0]++;
+ choice[0]%=dco_calibrations_count;
+ }
+ #endif
+
+ //Minor delay.
+ while(i--);
+
+
+
+ return;
+}
+
+++ /dev/null
-#include "msp430x1612.c"
+++ /dev/null
-//! MSP430F1612/1611 clock and I/O definitions
-
-#include "platform.h"
-
-#ifdef __MSPGCC__
-#include <msp430.h>
-#else
-#include <signal.h>
-#include <io.h>
-#include <iomacros.h>
-#endif
-
-//! Receive a byte.
-unsigned char serial0_rx(){
- char c;
-
- while(!(IFG1&URXIFG0));//wait for a byte
- c = RXBUF0;
- IFG1&=~URXIFG0;
- U0TCTL &= ~URXSE;
-
- return c;
-}
-
-//! Receive a byte.
-unsigned char serial1_rx(){
- char c;
-
- while(!(IFG2&URXIFG1));//wait for a byte
- c = RXBUF1;
- IFG2&=~URXIFG1;
- U1TCTL &= ~URXSE;
-
- return c;
-}
-
-//! Transmit a byte.
-void serial0_tx(unsigned char x){
- while ((IFG1 & UTXIFG0) == 0); //loop until buffer is free
- TXBUF0 = x;
-}
-
-//! Transmit a byte on the second UART.
-void serial1_tx(unsigned char x){
- while ((IFG2 & UTXIFG1) == 0); //loop until buffer is free
- TXBUF1 = x;
-}
-
-/** Later, add support for the EZ430/FETUIF with 12MHz crystal
- UBR00=0xE2; UBR10=0x04; UMCTL0=0x00; // uart0 12000000Hz 9600bps
- UBR00=0x71; UBR10=0x02; UMCTL0=0x00; // uart0 12000000Hz 19200bps
- UBR00=0x38; UBR10=0x01; UMCTL0=0x55; // uart0 12000000Hz 38400bps
- UBR00=0xD0; UBR10=0x00; UMCTL0=0x4A; // uart0 12000000Hz 57581bps
- UBR00=0x68; UBR10=0x00; UMCTL0=0x04; // uart0 12000000Hz 115273bps
- */
-
-//! Set the baud rate.
-void setbaud0(unsigned char rate){
-
- //http://mspgcc.sourceforge.net/baudrate.html
- switch(rate){
- case 1://9600 baud
- UBR00=0x7F; UBR10=0x01; UMCTL0=0x5B; /* uart0 3683400Hz 9599bps */
- break;
- case 2://19200 baud
- UBR00=0xBF; UBR10=0x00; UMCTL0=0xF7; /* uart0 3683400Hz 19194bps */
- break;
- case 3://38400 baud
- UBR00=0x5F; UBR10=0x00; UMCTL0=0xBF; /* uart0 3683400Hz 38408bps */
- break;
- case 4://57600 baud
- UBR00=0x40; UBR10=0x00; UMCTL0=0x00; /* uart0 3683400Hz 57553bps */
- break;
- default:
- case 5://115200 baud
- UBR00=0x20; UBR10=0x00; UMCTL0=0x00; /* uart0 3683400Hz 115106bps */
- break;
- }
-}
-
-//! Set the baud rate of the second uart.
-void setbaud1(unsigned char rate){
- //http://mspgcc.sourceforge.net/baudrate.html
- switch(rate){
- case 1://9600 baud
- UBR01=0x7F; UBR11=0x01; UMCTL1=0x5B; /* uart0 3683400Hz 9599bps */
- break;
- case 2://19200 baud
- UBR01=0xBF; UBR11=0x00; UMCTL1=0xF7; /* uart0 3683400Hz 19194bps */
- break;
- case 3://38400 baud
- UBR01=0x5F; UBR11=0x00; UMCTL1=0xBF; /* uart0 3683400Hz 38408bps */
- break;
- case 4://57600 baud
- UBR01=0x40; UBR11=0x00; UMCTL1=0x00; /* uart0 3683400Hz 57553bps */
- break;
- default:
- case 5://115200 baud
- UBR01=0x20; UBR11=0x00; UMCTL1=0x00; /* uart0 3683400Hz 115106bps */
- break;
- }
-}
-
-
-void msp430_init_uart0(){
- /* RS232 */
-
- P3SEL |= BIT4|BIT5; // P3.4,5 = USART0 TXD/RXD
- P3DIR |= BIT4;
-
- UCTL0 = SWRST | CHAR; /* 8-bit character, UART mode */
- UTCTL0 = SSEL1; /* UCLK = MCLK */
-
- setbaud0(0);
-
- ME1 &= ~USPIE0; /* USART1 SPI module disable */
- ME1 |= (UTXE0 | URXE0); /* Enable USART1 TXD/RXD */
-
- UCTL0 &= ~SWRST;
-
- /* XXX Clear pending interrupts before enable!!! */
- U0TCTL |= URXSE;
-
-
- //IE1 |= URXIE1; /* Enable USART1 RX interrupt */
-}
-
-
-void msp430_init_uart1(){
-
- /* RS232 */
- P3DIR &= ~0x80; /* Select P37 for input (UART1RX) */
- P3DIR |= 0x40; /* Select P36 for output (UART1TX) */
- P3SEL |= 0xC0; /* Select P36,P37 for UART1{TX,RX} */
-
- UCTL1 = SWRST | CHAR; /* 8-bit character, UART mode */
- UTCTL1 = SSEL1; /* UCLK = MCLK */
-
- setbaud1(0);
-
- ME2 &= ~USPIE1; /* USART1 SPI module disable */
- ME2 |= (UTXE1 | URXE1); /* Enable USART1 TXD/RXD */
-
- UCTL1 &= ~SWRST;
-
- /* XXX Clear pending interrupts before enable!!! */
- U1TCTL |= URXSE;
-
- //IE2 |= URXIE1; /* Enable USART1 RX interrupt */
-}
-
-
-/** For EZ430/FETUIF
- void msp430_init_dco() {
- WDTCTL = WDTPW + WDTHOLD; //stop WDT
-
- BCSCTL1 = 0;
-
- do {
- int i;
- IFG1 &= ~OFIFG;
- for (i=0; i<1000; i++);
-
- } while (IFG1 & OFIFG);
-
- BCSCTL2 = SELM1 | DIVM1 | SELS;
-
-}
- */
-
-
-//! Initialization is correct.
-void msp430_init_dco_done(){
- //Nothing to do for the 1612.
-}
-
-
-void msp430_init_dco() {
-/* This code taken from the FU Berlin sources and reformatted. */
- //
-
-//Works well.
-//#define MSP430_CPU_SPEED 2457600UL
-
-//Too fast for internal resistor.
-//#define MSP430_CPU_SPEED 4915200UL
-
-//Max speed.
-//#define MSP430_CPU_SPEED 4500000UL
-
-//baud rate speed
-#define MSP430_CPU_SPEED 3683400UL
-#define DELTA ((MSP430_CPU_SPEED) / (32768 / 8))
- unsigned int compare, oldcapture = 0;
- unsigned int i;
-
- WDTCTL = WDTPW + WDTHOLD; //stop WDT
-
-
- DCOCTL=0xF0;
- //a4
- //1100
-
- /* ACLK is devided by 4. RSEL=6 no division for MCLK
- and SSMCLK. XT2 is off. */
- //BCSCTL1 = 0xa8;
-
- BCSCTL2 = 0x00; /* Init FLL to desired frequency using the 32762Hz
- crystal DCO frquenzy = 2,4576 MHz */
-
- PLEDOUT|=PLEDPIN;
-
- BCSCTL1 |= DIVA1 + DIVA0; /* ACLK = LFXT1CLK/8 */
- for(i = 0xffff; i > 0; i--) { /* Delay for XTAL to settle */
- asm("nop");
- }
-
- CCTL2 = CCIS0 + CM0 + CAP; // Define CCR2, CAP, ACLK
- TACTL = TASSEL1 + TACLR + MC1; // SMCLK, continous mode
-
-
- while(1) {
-
- while((CCTL2 & CCIFG) != CCIFG); /* Wait until capture occured! */
- CCTL2 &= ~CCIFG; /* Capture occured, clear flag */
- compare = CCR2; /* Get current captured SMCLK */
- compare = compare - oldcapture; /* SMCLK difference */
- oldcapture = CCR2; /* Save current captured SMCLK */
-
- if(DELTA == compare) {
- break; /* if equal, leave "while(1)" */
- } else if(DELTA < compare) { /* DCO is too fast, slow it down */
- DCOCTL--;
- if(DCOCTL == 0xFF) { /* Did DCO role under? */
- BCSCTL1--;
- }
- } else { /* -> Select next lower RSEL */
- DCOCTL++;
- if(DCOCTL == 0x00) { /* Did DCO role over? */
- BCSCTL1++;
- }
- /* -> Select next higher RSEL */
- }
- }
-
- CCTL2 = 0; /* Stop CCR2 function */
- TACTL = 0; /* Stop Timer_A */
-
- BCSCTL1 &= ~(DIVA1 + DIVA0); /* remove /8 divisor from ACLK again */
-
- PLEDOUT=~PLEDPIN;
-
-}
-
+++ /dev/null
-
-//platform.h will handle patching Port 5 to be Port 3.
-
-
-#include "msp430x2618.c"
+++ /dev/null
-
-//platform.h will handle patching Port 5 to be Port 3.
-
-
-#include "msp430x2618.c"
+++ /dev/null
-//! MSP430F2618 clock and I/O definitions
-
-// Included by other 2xx ports, such as the 2274.
-
-#include "platform.h"
-
-#include "dco_calib.h"
-#ifdef __MSPGCC__
-#include <msp430.h>
-#else
-#include <signal.h>
-#include <io.h>
-#include <iomacros.h>
-#endif
-
-
-//! Receive a byte.
-unsigned char serial0_rx(){
- char c;
-
- while(!(IFG2&UCA0RXIFG));//wait for a byte
- c = UCA0RXBUF;
- IFG2&=~UCA0RXIFG;
-
- //UCA0CTL1 &= ~UCA0RXSE;
- return c;
-}
-
-//! Receive a byte.
-unsigned char serial1_rx(){
- //TODO
- return 00;
-}
-
-//! Transmit a byte.
-void serial0_tx(unsigned char x){
- while ((IFG2 & UCA0TXIFG) == 0); //loop until buffer is free
- UCA0TXBUF = x; /* send the character */
- while(!(IFG2 & UCA0TXIFG));
-}
-//! Transmit a byte.
-void serial_tx_old(unsigned char x){
- while ((IFG2 & UCA0TXIFG) == 0); //loop until buffer is free
- UCA0TXBUF = x; /* send the character */
- while(!(IFG2 & UCA0TXIFG));
-}
-
-//! Transmit a byte on the second UART.
-void serial1_tx(unsigned char x){
-
-}
-
-//! Set the baud rate.
-void setbaud0(unsigned char rate){
-
- //Table 15-4, page 481 of 2xx Family Guide
- switch(rate){
- case 1://9600 baud
- UCA0BR1 = 0x06;
- UCA0BR0 = 0x82;
- break;
- case 2://19200 baud
- UCA0BR1 = 0x03;
- UCA0BR0 = 0x41;
- break;
- case 3://38400 baud
- UCA0BR1 = 0xa0;
- UCA0BR0 = 0x01;
- break;
- case 4://57600 baud
- UCA0BR1 = 0x1d;
- UCA0BR0 = 0x01;
- break;
- default:
- case 5://115200 baud
- UCA0BR0 = 0x8a;
- UCA0BR1 = 0x00;
- break;
- }
-}
-
-//! Set the baud rate of the second uart.
-void setbaud1(unsigned char rate){
-
-}
-
-#define BAUD0EN 0x41
-#define BAUD1EN 0x03
-
-void msp430_init_uart(){
-
- // Serial on P3.4, P3.5
- P3SEL |= BIT4 + BIT5;
- P3DIR |= BIT4;
-
- //UCA0CTL1 |= UCSWRST; /* disable UART */
-
- UCA0CTL0 = 0x00;
- //UCA0CTL0 |= UCMSB ;
-
- UCA0CTL1 |= UCSSEL_2; // SMCLK
-
- //UCA0BR0 = BAUD0EN; // 115200
- //UCA0BR1 = BAUD1EN;
- setbaud(5);//default baud, 115200
-
- UCA0MCTL = 0; // Modulation UCBRSx = 5
- UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
-
-
- //Leave this commented!
- //Interrupt is handled by target code, not by bootloader.
- //IE2 |= UCA0RXIE;
-}
-
-
-//! Initialization is correct.
-void msp430_init_dco_done(){
- char *choice=(char *) 0x200; //First word of RAM.
- choice[0]--;
-}
-
-//! Initialize the MSP430 clock.
-void msp430_init_dco() {
- int i=1000;
- char *choice=(char *) 0x200; //First word of RAM.
-
- #ifdef __MSP430_HAS_PORT8__
- P8SEL = 0; // disable XT2 on P8.7/8
- #endif
-
- //Set P2.6 mode for MSP430F2274
- #ifndef __MSP430_HAS_PORT5__
- P2SEL = 0; //disable XIN on 2274
- #endif
-
-
- #ifdef STATICDCO
- BCSCTL1 = (STATICDCO>>8);
- DCOCTL = (STATICDCO&0xFF);
- #else
- if(CALBC1_16MHZ!=0xFF){
- //Info is intact, use it.
- BCSCTL1 = CALBC1_16MHZ;
- DCOCTL = CALDCO_16MHZ;
- }else{
- /*
- Info is missing, guess at a good value.
-
- A list of correct calibrations in included as dco_calib.c,
- generated by script.
- */
- DCOCTL = 0x00; //clear DCO
-
- BCSCTL1 = dco_calibrations[2*choice[0]+1];
- DCOCTL = dco_calibrations[2*choice[0]];
- choice[0]++;
- choice[0]%=dco_calibrations_count;
- }
- #endif
-
- //Minor delay.
- while(i--);
-
-
-
- return;
-}
-
#define PLEDPIN 0x20
//Use P3 instead of P5 for target I/O on chips without P5.
-#ifdef msp430x2274
+#ifdef msp430f2274
//#warning "No P5, using P3 instead. Will break 2618 and 1612 support."
#define P5OUT P3OUT
#define P5DIR P3DIR
#define PLEDPIN PB0
//Use P3 instead of P5 for target I/O on chips without P5.
-#ifdef msp430x2274
+#ifdef msp430f2274
//#warning "No P5, using P3 instead. Will break 2618 and 1612 support."
# define P5OUT P3OUT
# define P5DIR P3DIR
#define PLEDPIN BIT0
//Use P3 instead of P5 for target I/O on chips without P5.
-#ifdef msp430x2274
+#ifdef msp430f2274
//#warning "No P5, using P3 instead. Will break 2618 and 1612 support."
#define P5OUT P3OUT
#define P5DIR P3DIR
projects / goodfet / commitdiff