"""Move the FET into the JTAG ARM application."""
#print "Initializing ARM."
self.writecmd(0x13,SETUP,0,self.data)
- def getpc(self):
- return self.ARMgetPC()
def flash(self,file):
"""Flash an intel hex file to code memory."""
print "Flash not implemented.";
- def dump(self,file,start=0,stop=0xffff):
+ def dump(self,fn,start=0,stop=0xffffffff):
"""Dump an intel hex file from code memory."""
+
+ print "Dumping from %04x to %04x as %s." % (start,stop,f);
+ # FIXME: get mcu state and return it to that state
+ self.halt()
+
+ h = IntelHex(None);
+ i=start;
+ while i<=stop:
+ data=self.ARMreadChunk(i, 48, verbose=0);
+ print "Dumped %06x."%i;
+ for dword in data:
+ if i<=stop and dword != 0xdeadbeef:
+ h.puts( i, struct.pack("<I", dword) )
+ i+=4;
+ # FIXME: get mcu state and return it to that state
+ self.resume()
+ h.write_hex_file(fn);
+
print "Dump not implemented.";
def ARMshift_IR(self, IR, noretidle=0):
self.writecmd(0x13,IR_SHIFT,2, [IR, LSB|noretidle])
def ARMgetPC(self):
"""Get an ARM's PC. Note: real PC gets all wonky in debug mode, this is the "saved" PC"""
return self.storedPC
+ getpc = ARMgetPC
def ARMsetPC(self, val):
"""Set an ARM's PC. Note: real PC gets all wonky in debug mode, this changes the "saved" PC which is used when exiting debug mode"""
self.storedPC = val
self.ARMsetModeARM()
# branch to the right address
self.ARMset_register(15, self.storedPC)
- print hex(self.storedPC)
- print hex(self.ARMget_register(15))
- print hex(self.ARMchain0(self.storedPC,self.flags)[0])
+ #print hex(self.storedPC)
+ #print hex(self.ARMget_register(15))
+ #print hex(self.ARMchain0(self.storedPC,self.flags)[0])
+ self.ARMchain0(self.storedPC,self.flags)
self.ARM_nop(0)
self.ARM_nop(1)
self.ARMdebuginstr(ARM_INSTR_B_IMM | 0xfffff0,0)
self.ARMdebuginstr(THUMB_INSTR_MOV_PC_R0,0)
self.ARM_nop(0)
self.ARM_nop(1)
- print hex(self.storedPC)
- print hex(self.ARMget_register(15))
+ #print hex(self.storedPC)
+ #print hex(self.ARMget_register(15))
print hex(self.ARMchain0(self.storedPC,self.flags)[0])
self.ARMdebuginstr(THUMB_INSTR_B_IMM | (0x7fc07fc),0)
self.ARM_nop(0)
self.ARM_nop(0)
self.ARMrestart()
self.ARMwaitDBG()
- print hex(self.ARMget_register(1))
+ #print hex(self.ARMget_register(1))
# FIXME: this may end up changing te current debug-state. should we compare to current_dbgstate?
#print repr(self.data[4])
self.ARMset_register(1, r1); # restore R0 and R1
self.ARMset_register(0, r0);
return retval
- def ARMreadChunk(self, adr, wordcount):
+ def ARMreadChunk(self, adr, wordcount, verbose=1):
""" Only works in ARM mode currently
WARNING: Addresses must be word-aligned!
"""
output = []
count = wordcount
while (wordcount > 0):
- if (wordcount%64 == 0): sys.stderr.write(".")
+ if (verbose and wordcount%64 == 0): sys.stderr.write(".")
count = (wordcount, 0xe)[wordcount>0xd]
bitmask = LDM_BITMASKS[count]
self.ARMset_register(14,adr)
self.ARM_nop(0)
self.ARMrestart()
self.ARMwaitDBG()
- print >>sys.stderr,hex(self.ARMget_register(1))
+ #print >>sys.stderr,hex(self.ARMget_register(1))
self.ARMset_register(1, r1); # restore R0 and R1
self.ARMset_register(0, r0);
def writeMemByte(self, adr, byte):
bulk = chop(address,4)
bulk.extend(chop(bits,8))
bulk.extend(chop(data,4))
- print >>sys.stderr,(repr(bulk))
+ #print >>sys.stderr,(repr(bulk))
self.writecmd(0x13,CHAIN0,16,bulk)
d1,b1,a1 = struct.unpack("<LQL",self.data)
return (a1,b1,d1)
+
def start(self):
"""Start debugging."""
self.writecmd(0x13,START,0,self.data)
--- /dev/null
+#!/usr/bin/env python
+
+import sys;
+import struct
+import binascii;
+
+from GoodFETARM7 import GoodFETARM
+from intelhex import IntelHex16bit, IntelHex
+
+
+if(len(sys.argv)==1):
+ print "Usage: %s verb [objects]\n" % sys.argv[0]
+ # halt, resume... but need for flash and dump to leave it as it was
+ print "%s info" % sys.argv[0]
+ print "%s dump $foo.hex [0x$start 0x$stop]" % sys.argv[0]
+ print "%s erase" % sys.argv[0]
+ print "%s eraseinfo" % sys.argv[0]
+ print "%s flash $foo.hex [0x$start 0x$stop]" % sys.argv[0]
+ print "%s verify $foo.hex [0x$start 0x$stop]" % sys.argv[0]
+ print "%s poke 0x$adr 0x$val" % sys.argv[0]
+ print "%s peek 0x$start [0x$stop]" % sys.argv[0]
+ print "%s reset" % sys.argv[0]
+ sys.exit()
+
+#Initialize FET and set baud rate
+client=GoodFETARM();
+client.serInit()
+
+client.setup();
+client.start();
+
+if(sys.argv[1]=="info"):
+ pass
+
+if(sys.argv[1]=="dump"):
+ f = sys.argv[2];
+ start=0x00000000;
+ stop=0xFFFFFFFF;
+ if(len(sys.argv)>3):
+ start=int(sys.argv[3],16);
+ if(len(sys.argv)>4):
+ stop=int(sys.argv[4],16);
+
+ print "Dumping from %04x to %04x as %s." % (start,stop,f);
+ #h = IntelHex16bit(None);
+ # FIXME: get mcu state and return it to that state
+ client.halt()
+
+ h = IntelHex(None);
+ i=start;
+ while i<=stop:
+ #data=client.ARMreadMem(i, 48);
+ data=client.ARMreadChunk(i, 48, verbose=0);
+ print "Dumped %06x."%i;
+ for dword in data:
+ if i<=stop and dword != 0xdeadbeef:
+ h.puts( i, struct.pack("<I", dword) )
+ i+=4;
+ # FIXME: get mcu state and return it to that state
+ client.resume()
+ h.write_hex_file(f);
+
+'''
+if(sys.argv[1]=="erase"):
+ print "Erasing main flash memory."
+ client.ARMmasserase();
+
+if(sys.argv[1]=="eraseinfo"):
+ print "Erasing info memory."
+ client.ARMinfoerase();
+
+
+'''
+if(sys.argv[1]=="ivt"):
+ client.ARMreprChunk(0xFFC0,0xFFFF);
+
+if(sys.argv[1]=="regs"):
+ for i in range(0,16):
+ print "r%i=%04x" % (i,client.ARMget_register(i));
+
+if(sys.argv[1]=="flash"):
+ f=sys.argv[2];
+ start=0;
+ stop=0x10000;
+ if(len(sys.argv)>3):
+ start=int(sys.argv[3],16);
+ if(len(sys.argv)>4):
+ stop=int(sys.argv[4],16);
+
+ client.halt()
+ h = IntelHex16bit(f);
+
+ #Should this be default?
+ #Makes flashing multiple images inconvenient.
+ #client.ARMmasserase();
+
+ count=0; #Bytes in commit.
+ first=0;
+ vals=[];
+ last=0; #Last address committed.
+ for i in h._buf.keys():
+ if((count>0x40 or last+2!=i) and count>0 and i&1==0):
+ #print "%i, %x, %x" % (len(vals), last, i);
+ client.ARMpokeflashblock(first,vals);
+ count=0;
+ first=0;
+ last=0;
+ vals=[];
+ if(i>=start and i<stop and i&1==0):
+ val=h[i>>1];
+ if(count==0):
+ first=i;
+ last=i;
+ count+=2;
+ vals+=[val&0xff,(val&0xff00)>>8];
+ if(i%0x100==0):
+ print "%04x" % i;
+ if count>0: #last commit, ivt
+ client.ARMpokeflashblock(first,vals);
+ client.resume()
+
+if(sys.argv[1]=="verify"):
+ f=sys.argv[2];
+ start=0;
+ stop=0xFFFF;
+ if(len(sys.argv)>3):
+ start=int(sys.argv[3],16);
+ if(len(sys.argv)>4):
+ stop=int(sys.argv[4],16);
+
+ client.halt()
+ h = IntelHex16bit(f);
+ for i in h._buf.keys():
+ if(i>=start and i<stop and i&1==0):
+ peek=client.ARMreadMem(i)
+ if(h[i>>1]!=peek):
+ print "ERROR at %04x, found %04x not %04x"%(i,peek,h[i>>1]);
+ if(i%0x100==0):
+ print "%04x" % i;
+ client.resume()
+
+
+if(sys.argv[1]=="peek"):
+ start=0x0000;
+ if(len(sys.argv)>2):
+ start=int(sys.argv[2],16);
+ stop=start;
+ if(len(sys.argv)>3):
+ stop=int(sys.argv[3],16);
+
+ print "Peeking from %04x to %04x." % (start,stop);
+ client.halt()
+ for dword in client.ARMreadChunk(start, (stop-start)/4, verbose=0):
+ print "%.4x: %.8x" % (start, dword)
+ start += 4
+ client.resume()
+
+if(sys.argv[1]=="poke"):
+ start=0x0000;
+ val=0x00;
+ if(len(sys.argv)>2):
+ start=int(sys.argv[2],16);
+ if(len(sys.argv)>3):
+ val=int(sys.argv[3],16);
+
+ print "Poking %06x to become %04x." % (start,val);
+ client.halt()
+ #???while client.ARMreadMem(start)[0]&(~val)>0:
+ client.ARMwriteChunk(start, [val])
+ print "Poked to %.8x" % client.ARMreadMem(start)[0]
+ client.resume()
+
+
+if(sys.argv[1]=="reset"):
+ #Set PC to RESET vector's value.
+
+ client.ARMsetPC(0x00000000);
+ client.ARMreleasecpu();
+
+#client.ARMreleasecpu();
+#client.ARMstop();
projects / goodfet / commitdiff