From: travisutk Date: Mon, 15 Feb 2010 04:44:07 +0000 (+0000) Subject: Major glitching revisions. X-Git-Url: http://git.rot13.org/?p=goodfet;a=commitdiff_plain;h=3990dfe00fc611081fc60db0498c29ca94001695 Major glitching revisions. git-svn-id: https://svn.code.sf.net/p/goodfet/code/trunk@320 12e2690d-a6be-4b82-a7b7-67c4a43b65c8 --- diff --git a/firmware/apps/glitch/glitch.c b/firmware/apps/glitch/glitch.c index 95653ff..df7dc86 100644 --- a/firmware/apps/glitch/glitch.c +++ b/firmware/apps/glitch/glitch.c @@ -15,20 +15,11 @@ //! Call this before the function to be glitched. void glitchprime(){ #ifdef DAC12IR - //Don't forget to call glitchvoltages(). - P5OUT|=0x80; - //Reconfigure TACTL. - TACTL=0; //Clear dividers. - TACTL|=TACLR; //Clear TimerA Config - TACTL|= - TASSEL_SMCLK | //SMCLK source, - MC_1 | //Count up to CCR0 - TAIE; //Enable Interrupt - CCTL0 = CCIE; // CCR0 interrupt enabled - CCR0 = glitchcount; + WDTCTL = WDTPW + WDTHOLD; // Stop WDT - //Enable general interrupts, just in case. - //_EINT(); + glitchsetup(); + _EINT(); + return; #endif } @@ -42,13 +33,12 @@ void glitchsetup(){ P5OUT|=0x80; P6OUT|=BIT6+BIT5; - + WDTCTL = WDTPW + WDTHOLD; // Stop WDT TACTL = TASSEL1 + TACLR; // SMCLK, clear TAR CCTL0 = CCIE; // CCR0 interrupt enabled - CCR0 = glitchcount; - TACTL |= MC1; // Start Timer_A in continuous mode - //TACTL |= MC0; // Stop Timer_A; + CCR0 = glitchcount+0x30; //clock divider + TACTL |= MC_3; _EINT(); // Enable interrupts #endif } @@ -56,15 +46,15 @@ void glitchsetup(){ // Timer A0 interrupt service routine interrupt(TIMERA0_VECTOR) Timer_A (void) { + P1OUT^=1; P5OUT&=~BIT7;//Glitch P5OUT|=BIT7;//Normal - TACTL |= MC0; // Stop Timer_A; + TACTL |= MC0;// Stop Timer_A; + P1OUT&=~1; return; } - - u16 glitchcount=0; //! Glitch an application. @@ -76,7 +66,9 @@ void glitchapp(u8 app){ //! Set glitching voltages. void glitchvoltages(u16 gnd, u16 vcc){ int i; - //debugstr("Set glitching voltages."); + //debugstr("Set glitching voltages: GND and VCC"); + //debughex(gnd); + //debughex(vcc); #ifdef DAC12IR ADC12CTL0 = REF2_5V + REFON; // Internal 2.5V ref on @@ -98,6 +90,7 @@ void glitchrate(u16 rate){ void glitchhandle(unsigned char app, unsigned char verb, unsigned long len){ + P1OUT&=~1; switch(verb){ case GLITCHVOLTAGES: glitchvoltages(cmddataword[0],