From: travisutk Date: Sat, 2 Jan 2010 00:45:20 +0000 (+0000) Subject: Some bits of Spy-Bi-Wire support, thanks to Mark Rages. (Not yet complete.) X-Git-Url: http://git.rot13.org/?p=goodfet;a=commitdiff_plain;h=d7ad826230d336ad7b7bd20e47dccc26d7ad456f Some bits of Spy-Bi-Wire support, thanks to Mark Rages. (Not yet complete.) git-svn-id: https://svn.code.sf.net/p/goodfet/code/trunk@252 12e2690d-a6be-4b82-a7b7-67c4a43b65c8 --- diff --git a/firmware/Makefile b/firmware/Makefile index f4e6627..dfc8626 100644 --- a/firmware/Makefile +++ b/firmware/Makefile @@ -4,7 +4,7 @@ GOODFET?=/dev/ttyUSB0 #For tos-bsl, use --invert-reset --invert-test -BSL=goodfet.bsl -c $(GOODFET) --speed=38400 +BSL?=goodfet.bsl -c $(GOODFET) --speed=38400 #One of these should be defined explicitly. @@ -23,7 +23,7 @@ CCEXTRA?= CC=msp430-gcc -Wall -Os -g -mmcu=$(mcu) -D$(mcu) -DGCC $(GCCINC) -I include $(CCEXTRA) #Define extra modules here. -moreapps?=apps/i2c/i2c.o apps/chipcon/chipcon.o apps/glitch/glitch.o +moreapps?=apps/i2c/i2c.o apps/chipcon/chipcon.o apps/glitch/glitch.o apps/jtag/sbw.o apps= $(moreapps) apps/monitor/monitor.o apps/spi/spi.o apps/jtag/jtag.o apps/jtag/jtag430.o apps/jtag/jtag430x2.o apps/avr/avr.o libs= lib/$(mcu).o lib/command.o apps/jtag/jtag430asm.o diff --git a/firmware/apps/jtag/jtag.c b/firmware/apps/jtag/jtag.c index 6ef9315..20c4360 100644 --- a/firmware/apps/jtag/jtag.c +++ b/firmware/apps/jtag/jtag.c @@ -102,40 +102,6 @@ unsigned long jtagtransn(unsigned long word, return word; } -/* -//! Shift 16 bits in and out. -unsigned int jtagtrans16(unsigned int word){ //REMOVEME - unsigned int bit; - SAVETCLK; - - for (bit = 0; bit < 16; bit++) { - // write MOSI on trailing edge of previous clock - if (word & 0x8000) - {SETMOSI;} - else - {CLRMOSI;} - word <<= 1; - - if(bit==15) - SETTMS;//TMS high on last bit to exit. - - CLRTCK; - SETTCK; - // read MISO on trailing edge - word |= READMISO; - } - RESTORETCLK; - - // exit state - CLRTCK; - SETTCK; - // update state - CLRTMS; - CLRTCK; - SETTCK; - - return word; -}*/ //! Stop JTAG, release pins void jtag_stop(){ diff --git a/firmware/apps/jtag/jtag430.c b/firmware/apps/jtag/jtag430.c index 35874a8..7bfcba6 100644 --- a/firmware/apps/jtag/jtag430.c +++ b/firmware/apps/jtag/jtag430.c @@ -238,7 +238,8 @@ void jtag430_start(){ SETTST; SETRST; delay(0xFFFF); - + + #ifndef SBWREWRITE //Entry sequence from Page 67 of SLAU265A for 4-wire MSP430 JTAG CLRRST; delay(100); //100 @@ -249,6 +250,7 @@ void jtag430_start(){ SETRST; P5DIR&=~RST; delay(0xFFFF); + #endif //Perform a reset and disable watchdog. jtag430_por(); @@ -322,7 +324,9 @@ void jtag430handle(unsigned char app, //TAP setup, fuse check jtag430_resettap(); - txdata(app,verb,0); + cmddata[0]=jtag_ir_shift8(IR_BYPASS); + txdata(app,verb,1); + break; case STOP: jtag430_stop(); diff --git a/firmware/apps/jtag/sbw.c b/firmware/apps/jtag/sbw.c new file mode 100644 index 0000000..bdc025c --- /dev/null +++ b/firmware/apps/jtag/sbw.c @@ -0,0 +1,107 @@ +/*! \file sbw.c + \author Travis Goodspeed and Mark Rages + \brief Spy-Bi-Wire Mod of JTAG430 and JTAG430X + + As SBW is merely a multiplexed method of handling JTAG signals, this + module works by replacing preprocessor definitions in the + traditional modules to make them SBW compatible. Function pointers + would be size efficient, but so it goes. +*/ + +#include "platform.h" +#include "command.h" +#include "jtag.h" +#include "sbw.h" + +void sbwsetup(){ + /* To select the 2-wire SBW mode, the SBWTDIO line is held high and + the first clock is applied on SBWTCK. After this clock, the + normal SBW timings are applied starting with the TMS slot, and + the normal JTAG patterns can be applied, typically starting with + the Tap Reset and Fuse Check sequence. The SBW mode is exited by + holding the TEST/SWBCLK low for more than 100 μs. + */ + + // tdio up, tck low + // + P5OUT &= ~SBWTCK; + P5OUT |= SBWTDIO; + P5DIR |= SBWTDIO|SBWTCK; + + msdelay(1); + SBWCLK(); + + SBWCLK(); + + // now we're in SBW mode +} + +void sbwhandle(u8 app, u8 verb, u8 len){ + debugstr("Coming soon."); + txdata(app,NOK,0); +} + + + +//FIXME these should be prefixed with sbw +//to prevent name pollution. +int tms=1, tdi=1, tdo=0; + +void clock_sbw() { + //exchange TMS + SETSBWIO(tms); + SBWCLK(); + + //exchange TDI + SETSBWIO(tdi); + SBWCLK(); + + //exchange TDO + P5DIR &= ~SBWTDIO; //input mode + P5OUT &= ~SBWTCK; //Drop Metaclock + tdo=!!(P5IN & SBWTDIO); + P5OUT |= SBWTCK; //output mode + P5DIR |= SBWTDIO; //Raise Metaclock + + //TCK implied +} + + +void sbwSETTCLK(){ + SETSBWIO(tms); + SBWCLK(); + + SETSBWIO(1);asm("nop");asm("nop"); + SETSBWIO(0);asm("nop");asm("nop"); + SETSBWIO(1);asm("nop");asm("nop"); + SETSBWIO(0);asm("nop");asm("nop"); + SETSBWIO(1);asm("nop");asm("nop"); + + SBWCLK(); + + P5DIR &= ~SBWTDIO; + P5OUT &= ~SBWTCK; + //tdo=!!(P5IN & SBWTDIO); + P5OUT |= SBWTCK; + P5DIR |= SBWTDIO; +} + +void sbwCLRTCLK(){ + SETSBWIO(tms); + SBWCLK(); + + SETSBWIO(0);asm("nop");asm("nop"); + SETSBWIO(1);asm("nop");asm("nop"); + SETSBWIO(0);asm("nop");asm("nop"); + SETSBWIO(1);asm("nop");asm("nop"); + SETSBWIO(0);asm("nop");asm("nop"); + + SBWCLK(); + + P5DIR &= ~SBWTDIO; + P5OUT &= ~SBWTCK; + //tdo=!!(P5IN & SBWTDIO); + P5OUT |= SBWTCK; + P5DIR |= SBWTDIO; +} + diff --git a/firmware/include/command.h b/firmware/include/command.h index 2a751a8..6f94d6b 100644 --- a/firmware/include/command.h +++ b/firmware/include/command.h @@ -110,6 +110,8 @@ void txword(unsigned int l); //! Transmit a debug string. void debugstr(const char *str); +//! brief Debug a hex word string. +void debughex(u16 v); //! Delay for a count. void delay(unsigned int count); diff --git a/firmware/include/jtag.h b/firmware/include/jtag.h index 1ef3b79..72c7a4f 100644 --- a/firmware/include/jtag.h +++ b/firmware/include/jtag.h @@ -104,6 +104,8 @@ extern int savedtclk; #define SAVETCLK savedtclk=P5OUT&TCLK; #define RESTORETCLK if(savedtclk) P5OUT|=TCLK; else P5OUT&=~TCLK +//Replace every "CLRTCK SETTCK" with this. +#define TCKTOCK CLRTCK,SETTCK //16-bit MSP430 JTAG commands, bit-swapped #define IR_CNTRL_SIG_16BIT 0xC8 // 0x13 diff --git a/firmware/include/sbw.h b/firmware/include/sbw.h new file mode 100644 index 0000000..3ca6063 --- /dev/null +++ b/firmware/include/sbw.h @@ -0,0 +1,82 @@ +/*! \file sbw.h + \author Travis Goodspeed and Mark Rages + \brief Spy-Bi-Wire Stuff +*/ + +//IO Pins; these are for EZ430, not GoodFET/UIF +#define SBWTCK BIT3 +#define SBWTDIO BIT2 + +//This should be universal, move to jtag.h +#define TCKTOCK CLRTCK,SETTCK + +//If SBW is defined, rewrite JTAG functions to be SBW. +#ifdef SBWREWRITE +#define jtagsetup sbwsetup + +// I/O Redefintions +extern int tms, tdi, tdo; +#define SETTMS tms=1 +#define CLRTMS tms=0 +#define SETTDI tdi=1 +#define CLRTDI tdi=0 +#define TCKTOCK clock_sbw() +#define SETMOSI SETTDI +#define CLRMOSI CLRTDI +#define READMISO tdo + +#endif + +//! Enter SBW mode. +void sbwsetup(); + +//! Handle a SBW request. +void sbwhandle(u8 app, u8 verb, u8 len); + +//! Perform a SBW bit transaction. +void clock_sbw(); +//! Set the TCLK line, performing a transaction. +void sbwSETTCLK(); +//! Clear the line. +void sbwCLRTCLK(); + +// Macros + +#define SBWCLK() do { \ + P5OUT &= ~SBWTCK; \ + asm("nop"); \ + asm("nop"); \ + asm("nop"); \ + P5OUT |= SBWTCK; \ + } while (0) +#define SETSBWIO(x) do { \ + if (x) \ + P5OUT |= SBWTDIO; \ + else \ + P5OUT &= ~SBWTDIO; \ + } while (0) +#undef RESTORETCLK +#define RESTORETCLK do { \ + if(savedtclk) { \ + SETTCLK; \ + } else { \ + CLRTCLK; \ + } \ + } while (0); +#undef SETTCLK +#define SETTCLK do { \ + sbwSETTCLK(); \ + savedtclk=1; \ + } while (0); +#undef CLRTCLK +#define CLRTCLK do { \ + sbwCLRTCLK(); \ + savedtclk=0; \ + } while (0); + +#undef SAVETCLK +//Do nothing for this. +#define SAVETCLK + + + diff --git a/firmware/lib/command.c b/firmware/lib/command.c index a826571..415171b 100644 --- a/firmware/lib/command.c +++ b/firmware/lib/command.c @@ -30,6 +30,28 @@ void debugstr(const char *str){ txstring(0xFF,0xFF,str); } +//! brief Debug a hex word string. +void debughex(u16 v) { + unsigned char a[7]; + a[0]='0'; a[1]='x'; + + a[2]=0xf&(v>>12); + a[2]+=(a[2]>9)?('a'-10):'0'; + + a[3]=0xf&(v>>8); + a[3]+=(a[3]>9)?('a'-10):'0'; + + a[4]=0xf&(v>>4); + a[4]+=(a[4]>9)?('a'-10):'0'; + + a[5]=0xf&(v>>0); + a[5]+=(a[5]>9)?('a'-10):'0'; + + a[6]=0; + + txstring(0xFF,0xFF,a); +} + /*! \brief Transmit debug bytes. Transmits bytes for debugging. diff --git a/firmware/lib/msp430x1612.c b/firmware/lib/msp430x1612.c index ab8c76e..386119f 100644 --- a/firmware/lib/msp430x1612.c +++ b/firmware/lib/msp430x1612.c @@ -42,6 +42,14 @@ void serial1_tx(unsigned char x){ TXBUF1 = x; } +/** Later, add support for the EZ430/FETUIF with 12MHz crystal + UBR00=0xE2; UBR10=0x04; UMCTL0=0x00; // uart0 12000000Hz 9600bps + UBR00=0x71; UBR10=0x02; UMCTL0=0x00; // uart0 12000000Hz 19200bps + UBR00=0x38; UBR10=0x01; UMCTL0=0x55; // uart0 12000000Hz 38400bps + UBR00=0xD0; UBR10=0x00; UMCTL0=0x4A; // uart0 12000000Hz 57581bps + UBR00=0x68; UBR10=0x00; UMCTL0=0x04; // uart0 12000000Hz 115273bps + */ + //! Set the baud rate. void setbaud(unsigned char rate){ @@ -116,6 +124,24 @@ void msp430_init_uart(){ } +/** For EZ430/FETUIF + void msp430_init_dco() { + WDTCTL = WDTPW + WDTHOLD; //stop WDT + + BCSCTL1 = 0; + + do { + int i; + IFG1 &= ~OFIFG; + for (i=0; i<1000; i++); + + } while (IFG1 & OFIFG); + + BCSCTL2 = SELM1 | DIVM1 | SELS; + +} + */ + void msp430_init_dco() { /* This code taken from the FU Berlin sources and reformatted. */ //